The University of Southampton
University of Southampton Institutional Repository

On Proving with Event-B that a Pipelined Processor Model Implements its ISA Specification

On Proving with Event-B that a Pipelined Processor Model Implements its ISA Specification
On Proving with Event-B that a Pipelined Processor Model Implements its ISA Specification
Microprocessor pipelining is a well-established technique that improves performance and reduces power consumption by overlapping instruction execution. Verifying, however, that an implementation meets this ISA specification is complex and time-consuming. One of the key verification issues that must be addressed is that of overlapping instruction execution. This can introduce hazards where, for instance, a new instruction reads the value from a register which will be written by an earlier instruction that has not yet completed. Using Event-B’s support for refinement with automated proof, a method is explored where the abstract machine represents directly an instruction from the ISA that specifies the effect that the instruction has on the microprocessor register file. Refinement is then used systematically to derive a concrete, pipelined execution of that instruction. Microarchitectural considerations are raised to the specification level and design choices can be verified much earlier in the flow. The method proposed therefore has the potential to be integrated into an existing high-level synthesis methodology, providing an automated design and verification flow from high-level specification to hardware.
Colley, John
53af70fc-be33-48c1-bd8e-959e2b77b3e1
Butler, Michael
54b9c2c7-2574-438e-9a36-6842a3d53ed0
Colley, John
53af70fc-be33-48c1-bd8e-959e2b77b3e1
Butler, Michael
54b9c2c7-2574-438e-9a36-6842a3d53ed0

Colley, John and Butler, Michael (2009) On Proving with Event-B that a Pipelined Processor Model Implements its ISA Specification. Dagstuhl Seminar on Refinement Based Methods for the Construction of Dependable Systems, Dagstuhl.

Record type: Conference or Workshop Item (Paper)

Abstract

Microprocessor pipelining is a well-established technique that improves performance and reduces power consumption by overlapping instruction execution. Verifying, however, that an implementation meets this ISA specification is complex and time-consuming. One of the key verification issues that must be addressed is that of overlapping instruction execution. This can introduce hazards where, for instance, a new instruction reads the value from a register which will be written by an earlier instruction that has not yet completed. Using Event-B’s support for refinement with automated proof, a method is explored where the abstract machine represents directly an instruction from the ISA that specifies the effect that the instruction has on the microprocessor register file. Refinement is then used systematically to derive a concrete, pipelined execution of that instruction. Microarchitectural considerations are raised to the specification level and design choices can be verified much earlier in the flow. The method proposed therefore has the potential to be integrated into an existing high-level synthesis methodology, providing an automated design and verification flow from high-level specification to hardware.

Text
Dagstuhl2009.pdf - Version of Record
Download (281kB)

More information

Published date: 2009
Additional Information: Event Dates: September 2009
Venue - Dates: Dagstuhl Seminar on Refinement Based Methods for the Construction of Dependable Systems, Dagstuhl, 2009-09-01
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 272590
URI: http://eprints.soton.ac.uk/id/eprint/272590
PURE UUID: 469430b8-50f7-48ef-aec4-02717363237a
ORCID for Michael Butler: ORCID iD orcid.org/0000-0003-4642-5373

Catalogue record

Date deposited: 22 Jul 2011 08:02
Last modified: 15 Mar 2024 02:50

Export record

Contributors

Author: John Colley
Author: Michael Butler ORCID iD

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of http://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×