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Improved vertical MOSFET performance using an epitaxial channel and stacked silicon-insulator structure

Improved vertical MOSFET performance using an epitaxial channel and stacked silicon-insulator structure
Improved vertical MOSFET performance using an epitaxial channel and stacked silicon-insulator structure
A vertical MOSFET (VMOST) incorporating an epitaxial channel and a drain junction in a stacked silicon-insulator structure is presented. In this device structure, an oxide layer near the drain junction edge (referred to as a junction stop) acts as a dopant diffusion barrier and consequently a shallow drain junction is formed to suppress short channel effects. To investigate the scalability of this device, a simulation study in the sub-100 nm regime calibrated to measured results on the fabricated devices is carried out. The use of an epitaxial channel delivers 50% higher drive current due to the higher mobility of the retrograde channel and the junction stop structure delivers improvements of threshold voltage roll-off and drain-induced barrier lowering compared with a conventional VMOST
field effect devices, scanning electron microscopy, semiconductor device characterization
0268-1242
1-4
Uchino, T.
706196b8-2f2c-403d-97aa-2995eac8572b
Gili, E.
6e227036-b8f4-4364-a0ce-28c3899294b8
Tan, L.
93a93652-be22-48a3-b4d0-b4e6605088d5
Buiu, O.
a994b22e-018b-4355-abd5-0227724f2a1a
Hall, S.
a11a8f8b-d6fb-47a7-82b1-1f76d2f170dc
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038
Uchino, T.
706196b8-2f2c-403d-97aa-2995eac8572b
Gili, E.
6e227036-b8f4-4364-a0ce-28c3899294b8
Tan, L.
93a93652-be22-48a3-b4d0-b4e6605088d5
Buiu, O.
a994b22e-018b-4355-abd5-0227724f2a1a
Hall, S.
a11a8f8b-d6fb-47a7-82b1-1f76d2f170dc
Ashburn, P.
68cef6b7-205b-47aa-9efb-f1f09f5c1038

Uchino, T., Gili, E., Tan, L., Buiu, O., Hall, S. and Ashburn, P. (2012) Improved vertical MOSFET performance using an epitaxial channel and stacked silicon-insulator structure. Semiconductor Science and Technology, 27 (6), 1-4. (doi:10.1088/0268-1242/27/6/062002).

Record type: Article

Abstract

A vertical MOSFET (VMOST) incorporating an epitaxial channel and a drain junction in a stacked silicon-insulator structure is presented. In this device structure, an oxide layer near the drain junction edge (referred to as a junction stop) acts as a dopant diffusion barrier and consequently a shallow drain junction is formed to suppress short channel effects. To investigate the scalability of this device, a simulation study in the sub-100 nm regime calibrated to measured results on the fabricated devices is carried out. The use of an epitaxial channel delivers 50% higher drive current due to the higher mobility of the retrograde channel and the junction stop structure delivers improvements of threshold voltage roll-off and drain-induced barrier lowering compared with a conventional VMOST

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More information

Published date: 8 May 2012
Keywords: field effect devices, scanning electron microscopy, semiconductor device characterization
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 338230
URI: https://eprints.soton.ac.uk/id/eprint/338230
ISSN: 0268-1242
PURE UUID: 577165b1-e9c9-434d-8b10-19425b3b0341

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Date deposited: 14 May 2012 09:08
Last modified: 19 Jul 2019 22:01

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