The University of Southampton
University of Southampton Institutional Repository

Radiation hardening by design: a novel gate level approach

Radiation hardening by design: a novel gate level approach
Radiation hardening by design: a novel gate level approach
Soft errors induced by radiation, causing malfunctions in electronic systems and circuits, have become one of the most challenging issues that impact the reliability of the modern processors even in sea-level applications. In this paper we present two novel radiation-hardening techniques at Gate-level. We present a Single-Event-Upset (SEU) tolerant Flip-Flop design with 38% less power overhead and 25% less area overhead at 65nm technology comparing to the conventional Triple Modular Redundancy (TMR) for Flip-Flop design. We also present an SEU-tolerant Clock-Gating scheme with less than 50% area-power overheads and no performance penalty comparing to the conventional TMR for clock-gating. Our simulations show that the proposed schemes can recover from SEU errors in 99% of the cases
SEU tolerant flip-flop design, SEU-tolerant clock-gating scheme, TMR, area-power overheads, electronic circuits, electronic systems, gate level approach, radiation-hardening techniques, sea-level applications, single-event-upset tolerant flip-flop design, size 65 nm, triple modular redundancy, flip-flops, integrated circuit reliability, logic design, radiation hardening (electronics)
978-1-4577-0598-4
74-79
IEEE
Ghahroodi, Massoud
23d6371c-f047-4afe-bdc7-f419654c8c88
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Ozer, Emre
07d738b5-0b1c-4291-8284-9179c191c3d2
Ghahroodi, Massoud
23d6371c-f047-4afe-bdc7-f419654c8c88
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Ozer, Emre
07d738b5-0b1c-4291-8284-9179c191c3d2

Ghahroodi, Massoud, Zwolinski, Mark and Ozer, Emre (2011) Radiation hardening by design: a novel gate level approach. In Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS). IEEE. pp. 74-79 . (doi:10.1109/AHS.2011.5963919).

Record type: Conference or Workshop Item (Paper)

Abstract

Soft errors induced by radiation, causing malfunctions in electronic systems and circuits, have become one of the most challenging issues that impact the reliability of the modern processors even in sea-level applications. In this paper we present two novel radiation-hardening techniques at Gate-level. We present a Single-Event-Upset (SEU) tolerant Flip-Flop design with 38% less power overhead and 25% less area overhead at 65nm technology comparing to the conventional Triple Modular Redundancy (TMR) for Flip-Flop design. We also present an SEU-tolerant Clock-Gating scheme with less than 50% area-power overheads and no performance penalty comparing to the conventional TMR for clock-gating. Our simulations show that the proposed schemes can recover from SEU errors in 99% of the cases

This record has no associated files available for download.

More information

Published date: June 2011
Venue - Dates: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS), San Diego Country Estates, United States, 2011-06-06 - 2011-06-09
Keywords: SEU tolerant flip-flop design, SEU-tolerant clock-gating scheme, TMR, area-power overheads, electronic circuits, electronic systems, gate level approach, radiation-hardening techniques, sea-level applications, single-event-upset tolerant flip-flop design, size 65 nm, triple modular redundancy, flip-flops, integrated circuit reliability, logic design, radiation hardening (electronics)
Organisations: EEE

Identifiers

Local EPrints ID: 339221
URI: http://eprints.soton.ac.uk/id/eprint/339221
ISBN: 978-1-4577-0598-4
PURE UUID: d5634a4c-5377-4eaa-93e7-5620851b1ebf
ORCID for Mark Zwolinski: ORCID iD orcid.org/0000-0002-2230-625X

Catalogue record

Date deposited: 25 May 2012 10:35
Last modified: 15 Mar 2024 02:39

Export record

Altmetrics

Contributors

Author: Massoud Ghahroodi
Author: Mark Zwolinski ORCID iD
Author: Emre Ozer

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of http://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×