Timing vulnerability factors of ultra deep-sub-micron CMOS
Timing vulnerability factors of ultra deep-sub-micron CMOS
Soft errors are a significant reliability issue for Ultra Deep-Sub-Micron (UDSM) CMOS circuits. Therefore, an accurate assessment of the Soft Error Rate (SER) is crucial. In this paper, we argue that the conventional definitions for the Window of Vulnerability (WOV) under-estimate the risk. We propose a new method for determining the timing factors and WOV for the sequential elements from the susceptibility perspective rather than the conventional performance perspective. We also discuss that the process variation does not have any special impact on the WOV. Our methodology leads to a more realistic definition of the WOV for SER computation.
soft errors, timing vulnerability factors, ultra deep-sub-micron CMOS, window of vulnerability, cmo integrated circuits, vlsi, timing circuits
202
Mokhtarpour Ghahroodi, M.M.
ddcafd7c-d60a-40c7-b883-3d6834dce889
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Wong, R.
f0075f4e-284d-4679-b077-9a057818a086
Wen, S.
a2072ad0-62d9-4aff-a92e-17da841c7687
May 2011
Mokhtarpour Ghahroodi, M.M.
ddcafd7c-d60a-40c7-b883-3d6834dce889
Zwolinski, M.
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Wong, R.
f0075f4e-284d-4679-b077-9a057818a086
Wen, S.
a2072ad0-62d9-4aff-a92e-17da841c7687
Mokhtarpour Ghahroodi, M.M., Zwolinski, M., Wong, R. and Wen, S.
(2011)
Timing vulnerability factors of ultra deep-sub-micron CMOS.
2011 16th IEEE European Test Symposium (ETS), Trondheim, Norway.
23 - 27 May 2011.
.
(doi:10.1109/ETS.2011.40).
Record type:
Conference or Workshop Item
(Poster)
Abstract
Soft errors are a significant reliability issue for Ultra Deep-Sub-Micron (UDSM) CMOS circuits. Therefore, an accurate assessment of the Soft Error Rate (SER) is crucial. In this paper, we argue that the conventional definitions for the Window of Vulnerability (WOV) under-estimate the risk. We propose a new method for determining the timing factors and WOV for the sequential elements from the susceptibility perspective rather than the conventional performance perspective. We also discuss that the process variation does not have any special impact on the WOV. Our methodology leads to a more realistic definition of the WOV for SER computation.
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More information
Published date: May 2011
Additional Information:
ISSN 1530-1877; E-ISBN 978-0-7695-4433-5; Print ISBN: 978-1-4577-0483-3
Venue - Dates:
2011 16th IEEE European Test Symposium (ETS), Trondheim, Norway, 2011-05-23 - 2011-05-27
Keywords:
soft errors, timing vulnerability factors, ultra deep-sub-micron CMOS, window of vulnerability, cmo integrated circuits, vlsi, timing circuits
Organisations:
EEE
Identifiers
Local EPrints ID: 339234
URI: http://eprints.soton.ac.uk/id/eprint/339234
PURE UUID: 83f26e63-c5e9-4d57-961b-b5c3898e3195
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Date deposited: 28 May 2012 14:49
Last modified: 15 Mar 2024 02:39
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Contributors
Author:
M.M. Mokhtarpour Ghahroodi
Author:
M. Zwolinski
Author:
R. Wong
Author:
S. Wen
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