Broad-band odd-number CMOS prescalers with quadrature/symmetrical outputs
Broad-band odd-number CMOS prescalers with quadrature/symmetrical outputs
In this brief we present two architectures for digital division by odd numbers suitable for implementation in high-speed prescalers. First, we show a technique that delivers accurate in-phase and quadrature outputs over a wide frequency range from an inherently symmetrical circuit structure, which is particularly suited to the realization of image-rejection transceiver architectures with offset local oscillator frequency. The second technique focuses on generating precise 50$%$ duty cycle outputs, which are intended for direct mixer drive to achieve low output dc offset and second-order input intercept point. Both concepts can be realized in a wide range of logic forms. Demonstrator circuits implemented in high-speed current-mode logic have been fabricated in 0.18-$muhbox{m}$ digital CMOS technology, and both techniques show robust odd-number division. The test chips consume approximately 7 mA each from a 1.8-V supply.
counting circuits, local oscillator (lo), radio-frequency (rf) integrated circuits
399-403
Dekate, P.
f4c4494c-f8b9-4a98-8717-62e42468cb43
Redman-White, W.
d5376167-c925-460f-8e9c-13bffda8e0bf
Leenaerts, D.M.W.
2847f917-2c2e-4fb1-937c-81437489644d
Long, J.R.
e8318821-f5e4-4ab0-b71b-ea056cd07d20
22 July 2012
Dekate, P.
f4c4494c-f8b9-4a98-8717-62e42468cb43
Redman-White, W.
d5376167-c925-460f-8e9c-13bffda8e0bf
Leenaerts, D.M.W.
2847f917-2c2e-4fb1-937c-81437489644d
Long, J.R.
e8318821-f5e4-4ab0-b71b-ea056cd07d20
Dekate, P., Redman-White, W., Leenaerts, D.M.W. and Long, J.R.
(2012)
Broad-band odd-number CMOS prescalers with quadrature/symmetrical outputs.
IEEE Transactions on Circuits and Systems II: Express Briefs, 59 (7), .
(doi:10.1109/TCSII.2012.2198986).
Abstract
In this brief we present two architectures for digital division by odd numbers suitable for implementation in high-speed prescalers. First, we show a technique that delivers accurate in-phase and quadrature outputs over a wide frequency range from an inherently symmetrical circuit structure, which is particularly suited to the realization of image-rejection transceiver architectures with offset local oscillator frequency. The second technique focuses on generating precise 50$%$ duty cycle outputs, which are intended for direct mixer drive to achieve low output dc offset and second-order input intercept point. Both concepts can be realized in a wide range of logic forms. Demonstrator circuits implemented in high-speed current-mode logic have been fabricated in 0.18-$muhbox{m}$ digital CMOS technology, and both techniques show robust odd-number division. The test chips consume approximately 7 mA each from a 1.8-V supply.
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More information
Published date: 22 July 2012
Keywords:
counting circuits, local oscillator (lo), radio-frequency (rf) integrated circuits
Organisations:
Electronics & Computer Science
Identifiers
Local EPrints ID: 341426
URI: http://eprints.soton.ac.uk/id/eprint/341426
ISSN: 1549-7747
PURE UUID: 8878c2f9-01e7-48bd-84ee-2748982fe2ff
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Date deposited: 23 Jul 2012 12:00
Last modified: 14 Mar 2024 11:40
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Contributors
Author:
P. Dekate
Author:
W. Redman-White
Author:
D.M.W. Leenaerts
Author:
J.R. Long
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