Design and control of a grid-connected interleaved inverter

Abstract

This paper is concernedwith the design and control of
a three-phase voltage source grid-connected interleaved inverter. This topology enables the use of low-current devices capable of switching at high frequency, which together with the ripple cancelation feature reduces the size of the output filter and the inverter considerably compared to an equivalent classical two-level voltage
source inverter with an LCL output filter using high-current
devices with considerably lower switching frequency. Due to its higher switching frequency and low-filter component values, the interleaved inverter also has a much higher bandwidth than the classical inverter, which improves grid voltage harmonics disturbance rejection and increases the speed of response of the inverter and its capability to ride through grid disturbance (e.g., voltage sags and swells). The paper discusses the selection of the number
of channels and the filter component values of the interleaved inverter. The design of the digital control system is then discussed in detail. Simulation and practical results are presented to validate the design and demonstrate its capabilities.

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ORCID for S.M. Sharkh: orcid.org/0000-0001-7335-8503

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