High resistivity Czochralski-silicon using deep level dopant compensation for RF passive devices
High resistivity Czochralski-silicon using deep level dopant compensation for RF passive devices
Combinations of analytical and experimental results indicate that deep level doping of Czochralski grown silicon wafers is capable of providing very high resistivity wafers suitable for silicon-on-insulator (SOI), integrated passive devices (IPD) and 3D integration configurations.
Deep level doping involves adding trace elements to silicon that compensate for background free carriers introduced by impurities in the silicon and pin the Fermi level near the mid bandgap intrinsic level. Starting from n-type Czochralski-silicon wafers with a nominal resistivity of 50 Ωcm, gold ion implantation and subsequent annealing were used to increase the resistivity of silicon wafers by up to 3 orders of magnitude, to values as high as 93 kΩcm.
Hall measurements performed over a large temperature range show that the increase in resistivity is solely due to a decrease in carrier concentration and not a decrease in mobility. The carrier concentration is only one order of magnitude larger than that of intrinsic silicon over a temperature range of 200-360 K. Hall results also show that the resistivity of the compensated material remains up to two orders of magnitude larger than that of the uncompensated material at near operating temperatures.
High frequency attenuation measurements in the 1-67 GHz range for coplanar waveguides show attenuation reductions of up to 76% from 0.76 dB/mm to 0.18 dB/mm at 10 GHz for those fabricated on uncompensated and compensated silicon respectively. Spiral inductors fabricated on both compensated and uncompensated silicon show up to a factor of 10 increase in the maximum quality factor from 0.3 to 3.1 for inductors on uncompensated and compensated silicon respectively. A 70% increase in maximum quality factor from 9 to 15.2 is exhibited by inductors commercially fabricated on compensated silicon when compared to those on float-zone silicon.
The coplanar waveguide and spiral inductor results provide clear evidence that deep level dopant compensation is effective in improving the performance of passive devices in the GHz frequency range.
Abuelgasim, A.
eaa5e29e-510d-45e4-a724-d7f69c05f853
October 2012
Abuelgasim, A.
eaa5e29e-510d-45e4-a724-d7f69c05f853
de Groot, C.H.
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Abuelgasim, A.
(2012)
High resistivity Czochralski-silicon using deep level dopant compensation for RF passive devices.
University of Southampton, Faculty of Physical Science and Engineering, Doctoral Thesis, 141pp.
Record type:
Thesis
(Doctoral)
Abstract
Combinations of analytical and experimental results indicate that deep level doping of Czochralski grown silicon wafers is capable of providing very high resistivity wafers suitable for silicon-on-insulator (SOI), integrated passive devices (IPD) and 3D integration configurations.
Deep level doping involves adding trace elements to silicon that compensate for background free carriers introduced by impurities in the silicon and pin the Fermi level near the mid bandgap intrinsic level. Starting from n-type Czochralski-silicon wafers with a nominal resistivity of 50 Ωcm, gold ion implantation and subsequent annealing were used to increase the resistivity of silicon wafers by up to 3 orders of magnitude, to values as high as 93 kΩcm.
Hall measurements performed over a large temperature range show that the increase in resistivity is solely due to a decrease in carrier concentration and not a decrease in mobility. The carrier concentration is only one order of magnitude larger than that of intrinsic silicon over a temperature range of 200-360 K. Hall results also show that the resistivity of the compensated material remains up to two orders of magnitude larger than that of the uncompensated material at near operating temperatures.
High frequency attenuation measurements in the 1-67 GHz range for coplanar waveguides show attenuation reductions of up to 76% from 0.76 dB/mm to 0.18 dB/mm at 10 GHz for those fabricated on uncompensated and compensated silicon respectively. Spiral inductors fabricated on both compensated and uncompensated silicon show up to a factor of 10 increase in the maximum quality factor from 0.3 to 3.1 for inductors on uncompensated and compensated silicon respectively. A 70% increase in maximum quality factor from 9 to 15.2 is exhibited by inductors commercially fabricated on compensated silicon when compared to those on float-zone silicon.
The coplanar waveguide and spiral inductor results provide clear evidence that deep level dopant compensation is effective in improving the performance of passive devices in the GHz frequency range.
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Ahmed Abuelgasim - PhD Thesis.pdf
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Published date: October 2012
Organisations:
University of Southampton, Nanoelectronics and Nanotechnology
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Local EPrints ID: 350849
URI: http://eprints.soton.ac.uk/id/eprint/350849
PURE UUID: 684a0287-49a4-4066-8acb-f0d8eae9584c
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Date deposited: 09 Apr 2013 13:46
Last modified: 15 Mar 2024 03:11
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Author:
A. Abuelgasim
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