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Exploiting CMOS technology to enhance the performance of ISFET sensors

Exploiting CMOS technology to enhance the performance of ISFET sensors
Exploiting CMOS technology to enhance the performance of ISFET sensors
This letter presents a novel method for fabricating ion-sensitive field-effect transistor (ISFET) devices in unmodified CMOS technologies. Conventional CMOS ISFETs utilize the protective passivation coating as the sensing membrane, with the sensed potential being coupled down to the floating MOS gate via a stack of conducting and insulating layers. The proposed structure minimizes the use of these layers by exploiting the passivation-opening mask, normally intended for bond-pad openings. Parasitic effects such as reduced transconductance and trapped charge within the floating gate structure are minimized, resulting in a lower VT and improved chemical transconductance efficiency. Other characteristics, including chemical sensitivity, reference leakage current, and noise power, are at comparable levels with conventional CMOS-based ISFET devices.
0741-3106
1053-1055
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Liu, Yan
3d2550f3-df3b-46fd-a49e-511f7abe6424
Constandinou, Timothy
7e96a846-736a-4728-919f-3beae16f69ee
Georgiou, Pantelis
90e3a373-77ee-4621-b65d-3f47e3b7895c
Toumazou, Chris
1541f8dd-53b0-41a3-8fbd-5351c3919194
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Liu, Yan
3d2550f3-df3b-46fd-a49e-511f7abe6424
Constandinou, Timothy
7e96a846-736a-4728-919f-3beae16f69ee
Georgiou, Pantelis
90e3a373-77ee-4621-b65d-3f47e3b7895c
Toumazou, Chris
1541f8dd-53b0-41a3-8fbd-5351c3919194

Prodromakis, Themistoklis, Liu, Yan, Constandinou, Timothy, Georgiou, Pantelis and Toumazou, Chris (2010) Exploiting CMOS technology to enhance the performance of ISFET sensors. IEEE Electron Device Letters, 31 (9), 1053-1055. (doi:10.1109/LED.2010.2052011).

Record type: Article

Abstract

This letter presents a novel method for fabricating ion-sensitive field-effect transistor (ISFET) devices in unmodified CMOS technologies. Conventional CMOS ISFETs utilize the protective passivation coating as the sensing membrane, with the sensed potential being coupled down to the floating MOS gate via a stack of conducting and insulating layers. The proposed structure minimizes the use of these layers by exploiting the passivation-opening mask, normally intended for bond-pad openings. Parasitic effects such as reduced transconductance and trapped charge within the floating gate structure are minimized, resulting in a lower VT and improved chemical transconductance efficiency. Other characteristics, including chemical sensitivity, reference leakage current, and noise power, are at comparable levels with conventional CMOS-based ISFET devices.

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More information

Published date: 19 July 2010
Organisations: Nanoelectronics and Nanotechnology

Identifiers

Local EPrints ID: 351530
URI: https://eprints.soton.ac.uk/id/eprint/351530
ISSN: 0741-3106
PURE UUID: bfb73e44-24a8-443d-b16d-ae9a90705870
ORCID for Themistoklis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

Catalogue record

Date deposited: 23 Apr 2013 13:50
Last modified: 06 Jun 2018 12:24

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Contributors

Author: Yan Liu
Author: Timothy Constandinou
Author: Pantelis Georgiou
Author: Chris Toumazou

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