The University of Southampton
University of Southampton Institutional Repository

Energy Efficient Multi-Core Processing

Energy Efficient Multi-Core Processing
Energy Efficient Multi-Core Processing
This paper evaluates the present state of the art
of energy-efficient embedded processor design techniques and
demonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve greater energy and area efficiency whilst maintaining performance. The picoMIPS architecture is presented, inspired by the MIPS, as an example of a minimal and energy efficient processor. The picoMIPS is a variable architecture RISC microprocessor with an application-specific minimised instruction set. Each implementation will contain only the necessary datapath elements in order to maximise area efficiency. Due to the relationship between logic gate count and power consumption, energy efficiency is also maximised in the
processor therefore the system is designed to perform a specific task in the most efficient processor-based form. The principles of the picoMIPS processor are illustrated with an example of the discrete cosine transform (DCT) and inverse DCT (IDCT) algorithms implemented in a multi-core context to demonstrate the concept of minimal architecture synthesis and how it can be used to produce an application specific, energy efficient processor.
1450-5843
3-10
Leech, Charles
6ba70c54-3792-41cd-a8d6-9e8884ae004f
Kazmierski, T J
a97d7958-40c3-413f-924d-84545216092a
Leech, Charles
6ba70c54-3792-41cd-a8d6-9e8884ae004f
Kazmierski, T J
a97d7958-40c3-413f-924d-84545216092a

Leech, Charles and Kazmierski, T J (2014) Energy Efficient Multi-Core Processing. ELECTRONICS,, 18 (1), 3-10. (doi:10.7251/ELS1418003L).

Record type: Article

Abstract

This paper evaluates the present state of the art
of energy-efficient embedded processor design techniques and
demonstrates, how small, variable-architecture embedded processors may exploit a run-time minimal architectural synthesis technique to achieve greater energy and area efficiency whilst maintaining performance. The picoMIPS architecture is presented, inspired by the MIPS, as an example of a minimal and energy efficient processor. The picoMIPS is a variable architecture RISC microprocessor with an application-specific minimised instruction set. Each implementation will contain only the necessary datapath elements in order to maximise area efficiency. Due to the relationship between logic gate count and power consumption, energy efficiency is also maximised in the
processor therefore the system is designed to perform a specific task in the most efficient processor-based form. The principles of the picoMIPS processor are illustrated with an example of the discrete cosine transform (DCT) and inverse DCT (IDCT) algorithms implemented in a multi-core context to demonstrate the concept of minimal architecture synthesis and how it can be used to produce an application specific, energy efficient processor.

Text
xPaper_01.pdf - Other
Download (806kB)

More information

Published date: June 2014
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 366664
URI: https://eprints.soton.ac.uk/id/eprint/366664
ISSN: 1450-5843
PURE UUID: 6aa2a689-02f2-411c-a8be-593f8d3d1e57
ORCID for Charles Leech: ORCID iD orcid.org/0000-0002-2403-3873

Catalogue record

Date deposited: 04 Jul 2014 15:11
Last modified: 19 Jul 2019 21:08

Export record

Altmetrics

Contributors

Author: Charles Leech ORCID iD
Author: T J Kazmierski

University divisions

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of https://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×