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Synthesis of application specific processor architectures for ultra-low energy consumption

Synthesis of application specific processor architectures for ultra-low energy consumption
Synthesis of application specific processor architectures for ultra-low energy consumption
In this paper we suggest that further energy savings can be achieved by a new approach to synthesis of embedded processor cores, where the architecture is tailored to the algorithms that the core executes. In the context of embedded processor synthesis, both single-core and many-core, the types of algorithms and demands on the execution efficiency are usually known at the chip design time. This knowledge can be utilised at the design stage to synthesise architectures optimised for energy consumption. Firstly, we present an overview of both traditional energy saving techniques and new developments in architectural approaches to energy-efficient processing. Secondly, we propose a picoMIPS architecture that serves as an architectural template for energy-efficient synthesis. As a case study, we show how the picoMIPS architecture can be tailored to an energy efficient execution of the DCT algorithm.
978-866125-098-9
Kazmierski, T J
a97d7958-40c3-413f-924d-84545216092a
Leech, Charles
6ba70c54-3792-41cd-a8d6-9e8884ae004f
Kazmierski, T J
a97d7958-40c3-413f-924d-84545216092a
Leech, Charles
6ba70c54-3792-41cd-a8d6-9e8884ae004f

Kazmierski, T J and Leech, Charles (2014) Synthesis of application specific processor architectures for ultra-low energy consumption. Small Systems Simulation Symposium, Serbia.

Record type: Conference or Workshop Item (Paper)

Abstract

In this paper we suggest that further energy savings can be achieved by a new approach to synthesis of embedded processor cores, where the architecture is tailored to the algorithms that the core executes. In the context of embedded processor synthesis, both single-core and many-core, the types of algorithms and demands on the execution efficiency are usually known at the chip design time. This knowledge can be utilised at the design stage to synthesise architectures optimised for energy consumption. Firstly, we present an overview of both traditional energy saving techniques and new developments in architectural approaches to energy-efficient processing. Secondly, we propose a picoMIPS architecture that serves as an architectural template for energy-efficient synthesis. As a case study, we show how the picoMIPS architecture can be tailored to an energy efficient execution of the DCT algorithm.

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Published date: 12 February 2014
Venue - Dates: Small Systems Simulation Symposium, Serbia, 2014-02-12
Organisations: Electronic & Software Systems

Identifiers

Local EPrints ID: 366668
URI: https://eprints.soton.ac.uk/id/eprint/366668
ISBN: 978-866125-098-9
PURE UUID: f5342c6d-ec8f-43fb-9391-516117b5f486
ORCID for Charles Leech: ORCID iD orcid.org/0000-0002-2403-3873

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Date deposited: 04 Jul 2014 15:07
Last modified: 06 Jun 2018 12:13

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Contributors

Author: T J Kazmierski
Author: Charles Leech ORCID iD

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