Coding scheme for low energy consumption fault tolerant bus
Coding scheme for low energy consumption fault tolerant bus
We address the problem of devising the error correcting code which, if used to encode the information on a very deep submicron (VDSM) bus, allows us to achieve fault-tolerance with the minimal impact on bus power consumption and power-delay product. In particular, we first report the results of an analysis that we performed on power dissipation in VDSM fault-tolerant busses using Hamming single error correcting codes. We show that no power saving is possible by choosing between different optimal Hamming codes with the same redundancy. We then propose a new coding scheme which provides a reduction of the energy consumption and power-delay product of over the 11.5% and 45%, respectively, with respect to the optimal (7,4) Hamming code, for a 0:13\mu m CMOS technology bus
0-7695-1641-6
8-12
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Van Dijk, V.E.S.
8936dddb-ac4d-42d3-91bc-08fa90efe2eb
Kleihorst, Richard
607853e6-6c51-47a4-8e85-f0d42aedfed5
Nieuwland, Andre'
dacdd71c-3302-43af-81a6-db1b540285a5
Metra, Cecilia
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July 2002
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Van Dijk, V.E.S.
8936dddb-ac4d-42d3-91bc-08fa90efe2eb
Kleihorst, Richard
607853e6-6c51-47a4-8e85-f0d42aedfed5
Nieuwland, Andre'
dacdd71c-3302-43af-81a6-db1b540285a5
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Rossi, Daniele, Van Dijk, V.E.S., Kleihorst, Richard, Nieuwland, Andre' and Metra, Cecilia
(2002)
Coding scheme for low energy consumption fault tolerant bus.
8th IEEE International On-Line Testing Workshop, Isle of Bendor, France.
.
(doi:10.1109/OLT.2002.1030176).
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Conference or Workshop Item
(Paper)
Abstract
We address the problem of devising the error correcting code which, if used to encode the information on a very deep submicron (VDSM) bus, allows us to achieve fault-tolerance with the minimal impact on bus power consumption and power-delay product. In particular, we first report the results of an analysis that we performed on power dissipation in VDSM fault-tolerant busses using Hamming single error correcting codes. We show that no power saving is possible by choosing between different optimal Hamming codes with the same redundancy. We then propose a new coding scheme which provides a reduction of the energy consumption and power-delay product of over the 11.5% and 45%, respectively, with respect to the optimal (7,4) Hamming code, for a 0:13\mu m CMOS technology bus
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Published date: July 2002
Venue - Dates:
8th IEEE International On-Line Testing Workshop, Isle of Bendor, France, 2002-07-01
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 368873
URI: http://eprints.soton.ac.uk/id/eprint/368873
ISBN: 0-7695-1641-6
PURE UUID: 1168579a-96d9-4e25-95af-d53d07d07562
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Date deposited: 29 Sep 2014 12:54
Last modified: 14 Mar 2024 17:54
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Contributors
Author:
Daniele Rossi
Author:
V.E.S. Van Dijk
Author:
Richard Kleihorst
Author:
Andre' Nieuwland
Author:
Cecilia Metra
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