Analysis of the impact of bus implemented EDCs on on-chip SSN
Analysis of the impact of bus implemented EDCs on on-chip SSN
In this paper, we analyze the impact of error detecting codes, implemented on an on-chip bus, on the on-chip simultaneous switching noise (SSN). First, we analyze in detail how SSN is impacted by different bus transitions, pointing out its dependency on the number and placement of switching wires. Afterwards, we present an analytical model that we have developed in order to estimate the SSN, and that we prove to be very accurate in SSN prediction. Finally, by employing the developed model, we estimate the SSN due to different EDCs implemented on an on-chip bus. In particular, we highlight how their differences in the number of switching wires, bus parallelism and codewords influence the on-chip SSN.
3-9810801-0-6
59-64
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Steiner, Carlo
281b832a-7a0c-4ce0-9778-5c0602993bcb
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
March 2006
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Steiner, Carlo
281b832a-7a0c-4ce0-9778-5c0602993bcb
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Rossi, Daniele, Steiner, Carlo and Metra, Cecilia
(2006)
Analysis of the impact of bus implemented EDCs on on-chip SSN.
Design, Automation and Test in Europe (DATE '06). Proceedings. Volume 1, Munich, Germany.
06 - 10 Mar 2006.
.
(doi:10.1109/DATE.2006.243982).
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Conference or Workshop Item
(Paper)
Abstract
In this paper, we analyze the impact of error detecting codes, implemented on an on-chip bus, on the on-chip simultaneous switching noise (SSN). First, we analyze in detail how SSN is impacted by different bus transitions, pointing out its dependency on the number and placement of switching wires. Afterwards, we present an analytical model that we have developed in order to estimate the SSN, and that we prove to be very accurate in SSN prediction. Finally, by employing the developed model, we estimate the SSN due to different EDCs implemented on an on-chip bus. In particular, we highlight how their differences in the number of switching wires, bus parallelism and codewords influence the on-chip SSN.
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Published date: March 2006
Venue - Dates:
Design, Automation and Test in Europe (DATE '06). Proceedings. Volume 1, Munich, Germany, 2006-03-06 - 2006-03-10
Organisations:
Electronic & Software Systems
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Local EPrints ID: 368894
URI: http://eprints.soton.ac.uk/id/eprint/368894
ISBN: 3-9810801-0-6
PURE UUID: b782e161-2b05-4773-8feb-5c0f9885473d
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Date deposited: 08 Oct 2014 15:13
Last modified: 14 Mar 2024 17:55
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Author:
Daniele Rossi
Author:
Carlo Steiner
Author:
Cecilia Metra
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