Checker no-harm alarm robustness
Checker no-harm alarm robustness
In this paper we evaluate the probability that a transient fault (TF), multiple or single, affecting a checker of a self-checking circuit, gives rise to an unnecessary error indication (no-harm alarm). A new property (no-harm alarm robustness) has been defined that, in case of a fault affecting a self-checking circuit (SCC), guarantees that we can determine whether the fault is affecting the functional block, or the checker itself, and whether such a fault is a transient or a permanent fault. Finally, we propose a possible solution implementing the defined property. Its behavior has been verified by means of HSpice simulations, and we evaluate its cost in terms of area overhead and introduced delay.
0-7695-2620-9
275-280
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Omana, Martin
7c091df8-0526-4d15-aa3f-f25dea90dd18
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Pagni, Andrea
21de1acc-04c6-4de9-97a3-b06aa5f90ce8
July 2006
Rossi, Daniele
30c42382-cf0a-447d-8695-fa229b7b8a2f
Omana, Martin
7c091df8-0526-4d15-aa3f-f25dea90dd18
Metra, Cecilia
c420be13-a9cf-471a-96fb-3f43a694ffae
Pagni, Andrea
21de1acc-04c6-4de9-97a3-b06aa5f90ce8
Rossi, Daniele, Omana, Martin, Metra, Cecilia and Pagni, Andrea
(2006)
Checker no-harm alarm robustness.
12th IEEE International On-Line Testing Symposium (IOLTS 2006), Como, Italy.
10 - 12 Jul 2006.
.
(doi:10.1109/IOLTS.2006.16).
Record type:
Conference or Workshop Item
(Paper)
Abstract
In this paper we evaluate the probability that a transient fault (TF), multiple or single, affecting a checker of a self-checking circuit, gives rise to an unnecessary error indication (no-harm alarm). A new property (no-harm alarm robustness) has been defined that, in case of a fault affecting a self-checking circuit (SCC), guarantees that we can determine whether the fault is affecting the functional block, or the checker itself, and whether such a fault is a transient or a permanent fault. Finally, we propose a possible solution implementing the defined property. Its behavior has been verified by means of HSpice simulations, and we evaluate its cost in terms of area overhead and introduced delay.
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Published date: July 2006
Venue - Dates:
12th IEEE International On-Line Testing Symposium (IOLTS 2006), Como, Italy, 2006-07-10 - 2006-07-12
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 368901
URI: http://eprints.soton.ac.uk/id/eprint/368901
ISBN: 0-7695-2620-9
PURE UUID: d54c5b3c-b80c-4105-ba0a-f6e780bc4d1c
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Date deposited: 08 Oct 2014 15:18
Last modified: 14 Mar 2024 17:55
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Contributors
Author:
Daniele Rossi
Author:
Martin Omana
Author:
Cecilia Metra
Author:
Andrea Pagni
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