High-reliability fault tolerant digital systems in nanometric technologies: characterization and design methodologies
High-reliability fault tolerant digital systems in nanometric technologies: characterization and design methodologies
This paper reports the main contribution of a project devoted to the definition of techniques to design and evaluate fault tolerant systems implemented using the SoPC paradigm, suitable for mission and safety-critical application environments. In particular, the effort of the five involved research units has been devoted to address some of the main issues related to the specific technological aspects introduced by these flexible platforms. The overall target of the research is the development of a design methodology for highly reliable systems realized on reconfigurable platforms based on a System-on-Programmable Chip (SoPC), as discussed in the next section.
fault tolerance, integrated circuit design, integrated circuit reliability, system-on-chip
978-1-4673-3043-5
121-125
Bolchini, C.
bccd95aa-f1c2-4c6f-8a07-af2028645b0c
Miele, A.
24f170ca-2838-4c9f-a54a-29fe4b392b26
Sandionigi, C.
e7be2e15-ca97-4028-a8bf-048ea98b77ba
Ottavi, M.
6836afa7-2fba-4ebb-8d31-60ff7b684603
Pontarelli, S.
7cd3ac26-29b9-42ef-ba7c-5906a00b0ec6
Salsano, A
df648eba-5211-4c8a-b736-dfdcaf826020
Metra, C.
5444008e-e513-43ce-98ae-5051989e1bf0
Omana, M.
e6b4b478-a8eb-4318-b497-6afa360ca1c2
Rossi, D.
30c42382-cf0a-447d-8695-fa229b7b8a2f
Sonza Reorda, M.
7f00adde-3ebd-4f94-a4a1-407582c3f392
Sterpone, L.
cc7e3fc7-03d4-4486-89b7-2f5842ae9e6f
Violante, M.
8747563f-3003-4760-bc72-b4b2c9a00483
Gerardin, S.
31117ec8-f42d-4875-9f2f-f4df8d0b5db9
Bagattin, M.
19c26dcb-3e08-493f-a0f4-ebfbfa5b0986
Paccagnella, A.
36c39900-f46d-43db-9b25-97080147894b
October 2012
Bolchini, C.
bccd95aa-f1c2-4c6f-8a07-af2028645b0c
Miele, A.
24f170ca-2838-4c9f-a54a-29fe4b392b26
Sandionigi, C.
e7be2e15-ca97-4028-a8bf-048ea98b77ba
Ottavi, M.
6836afa7-2fba-4ebb-8d31-60ff7b684603
Pontarelli, S.
7cd3ac26-29b9-42ef-ba7c-5906a00b0ec6
Salsano, A
df648eba-5211-4c8a-b736-dfdcaf826020
Metra, C.
5444008e-e513-43ce-98ae-5051989e1bf0
Omana, M.
e6b4b478-a8eb-4318-b497-6afa360ca1c2
Rossi, D.
30c42382-cf0a-447d-8695-fa229b7b8a2f
Sonza Reorda, M.
7f00adde-3ebd-4f94-a4a1-407582c3f392
Sterpone, L.
cc7e3fc7-03d4-4486-89b7-2f5842ae9e6f
Violante, M.
8747563f-3003-4760-bc72-b4b2c9a00483
Gerardin, S.
31117ec8-f42d-4875-9f2f-f4df8d0b5db9
Bagattin, M.
19c26dcb-3e08-493f-a0f4-ebfbfa5b0986
Paccagnella, A.
36c39900-f46d-43db-9b25-97080147894b
Bolchini, C., Miele, A., Sandionigi, C., Ottavi, M., Pontarelli, S., Salsano, A, Metra, C., Omana, M., Rossi, D., Sonza Reorda, M., Sterpone, L., Violante, M., Gerardin, S., Bagattin, M. and Paccagnella, A.
(2012)
High-reliability fault tolerant digital systems in nanometric technologies: characterization and design methodologies.
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Austin, United States.
03 - 05 Oct 2012.
.
(doi:10.1109/DFT.2012.6378211).
Record type:
Conference or Workshop Item
(Paper)
Abstract
This paper reports the main contribution of a project devoted to the definition of techniques to design and evaluate fault tolerant systems implemented using the SoPC paradigm, suitable for mission and safety-critical application environments. In particular, the effort of the five involved research units has been devoted to address some of the main issues related to the specific technological aspects introduced by these flexible platforms. The overall target of the research is the development of a design methodology for highly reliable systems realized on reconfigurable platforms based on a System-on-Programmable Chip (SoPC), as discussed in the next section.
Text
dft2012_Design.pdf
- Accepted Manuscript
More information
Published date: October 2012
Venue - Dates:
IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Austin, United States, 2012-10-03 - 2012-10-05
Keywords:
fault tolerance, integrated circuit design, integrated circuit reliability, system-on-chip
Organisations:
Electronic & Software Systems
Identifiers
Local EPrints ID: 368917
URI: http://eprints.soton.ac.uk/id/eprint/368917
ISBN: 978-1-4673-3043-5
PURE UUID: 638f7bb7-e9e7-4cf7-87e3-b8f04e7e057e
Catalogue record
Date deposited: 16 Sep 2014 16:20
Last modified: 14 Mar 2024 17:56
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Contributors
Author:
C. Bolchini
Author:
A. Miele
Author:
C. Sandionigi
Author:
M. Ottavi
Author:
S. Pontarelli
Author:
A Salsano
Author:
C. Metra
Author:
M. Omana
Author:
D. Rossi
Author:
M. Sonza Reorda
Author:
L. Sterpone
Author:
M. Violante
Author:
S. Gerardin
Author:
M. Bagattin
Author:
A. Paccagnella
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