Reversible logic to cryptographic hardware: a new paradigm
Reversible logic to cryptographic hardware: a new paradigm
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed in the working digital circuit. To prevent this type of attack, this paper proposes the use of reversible logic for designing the ALU of a cryptosystem. Ideally, reversible circuits dissipate zero energy. Thus, it would be of great significance to apply reversible logic to designing secure cryptosystems. As far as is known, this is the first attempt to apply reversible logic to developing secure cryptosystems. In a prototype of a reversible ALU for a crypto-processor, reversible designs of adders and Montgomery multipliers are presented. The reversible designs of a carry propagate adder, four-to-two and five-to-two carry save adders are presented using a reversible TSG gate. One of the important properties of the TSG gate is that it can work singly as a reversible full adder. In order to design the reversible Montgomery multiplier, novel reversible sequential circuits are also proposed which are integrated with the proposed adders to design a reversible modulo multiplier. It is intended that this paper will provide a starting point for developing cryptosystems secure against DPA attacks.
Thapliyal, Himanshu
13de001f-d755-4d08-b0d2-57a77c5b2c28
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
6 August 2006
Thapliyal, Himanshu
13de001f-d755-4d08-b0d2-57a77c5b2c28
Zwolinski, Mark
adfcb8e7-877f-4bd7-9b55-7553b6cb3ea0
Thapliyal, Himanshu and Zwolinski, Mark
(2006)
Reversible logic to cryptographic hardware: a new paradigm.
49th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '06), San Juan, United States.
06 - 09 Aug 2006.
5 pp
.
Record type:
Conference or Workshop Item
(Paper)
Abstract
Differential Power Analysis (DPA) presents a major challenge to mathematically-secure cryptographic protocols. Attackers can break the encryption by measuring the energy consumed in the working digital circuit. To prevent this type of attack, this paper proposes the use of reversible logic for designing the ALU of a cryptosystem. Ideally, reversible circuits dissipate zero energy. Thus, it would be of great significance to apply reversible logic to designing secure cryptosystems. As far as is known, this is the first attempt to apply reversible logic to developing secure cryptosystems. In a prototype of a reversible ALU for a crypto-processor, reversible designs of adders and Montgomery multipliers are presented. The reversible designs of a carry propagate adder, four-to-two and five-to-two carry save adders are presented using a reversible TSG gate. One of the important properties of the TSG gate is that it can work singly as a reversible full adder. In order to design the reversible Montgomery multiplier, novel reversible sequential circuits are also proposed which are integrated with the proposed adders to design a reversible modulo multiplier. It is intended that this paper will provide a starting point for developing cryptosystems secure against DPA attacks.
Text
0610089.pdf
- Accepted Manuscript
More information
Published date: 6 August 2006
Venue - Dates:
49th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS '06), San Juan, United States, 2006-08-06 - 2006-08-09
Organisations:
EEE
Identifiers
Local EPrints ID: 381080
URI: http://eprints.soton.ac.uk/id/eprint/381080
PURE UUID: 380d3d33-3dbf-4043-b6a3-284afadc76fb
Catalogue record
Date deposited: 24 Sep 2015 10:49
Last modified: 15 Mar 2024 02:39
Export record
Contributors
Author:
Himanshu Thapliyal
Author:
Mark Zwolinski
Download statistics
Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.
View more statistics