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Design and evaluation of a system-on-a-chip course

Halak, Basel and Wilson, Peter (2016) Design and evaluation of a system-on-a-chip course At 11th European Workshop on Microelectronics Education, United Kingdom. 11 - 13 May 2016.

Record type: Conference or Workshop Item (Paper)


This paper describes a system-on-chip design module, suitable for post-graduate students of electronics and computer engineering and for PhD students as a training course; it covers both analogue and digital design skills and flows, with emphasis on the use of industry standard tools such as Cadence, Synopsys, and Mentor Graphics. The course is designed using the constructive alignment method; it provides a solid experiential learning platform for systems-on chip design flow based on the Kolb learning cycle. The course’s assessment is based on two major design exercises and two lab-based assignments. The first exercise is a team based project designed to create a working environment similar to that in IC design companies, in which each student is required to design their part of the system and ensure its correctness before it can be integrated with overall design. The second major design exercise is an individual assignment where each student is given a unique set of specifications which he/she needs to take from the algorithmic level to a complete silicon chip. This paper also presents a systematic evaluation of the course based on reviews from students, peers, and the teaching team. Feedback results indicate that the module is very positively received by master level students at Southampton University.

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e-pub ahead of print date: May 2016
Published date: 10 June 2016
Venue - Dates: 11th European Workshop on Microelectronics Education, United Kingdom, 2016-05-11 - 2016-05-13
Organisations: EEE


Local EPrints ID: 394520
PURE UUID: e511c427-bb50-452c-813d-934fae04dfbd

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Date deposited: 16 May 2016 13:25
Last modified: 17 Jul 2017 19:00

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Author: Basel Halak
Author: Peter Wilson

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