Nawi, Illani Mohd, Halak, Basel and Zwolinski, Mark (2016) The influence of hysteresis voltage on single event transients in a 65nm CMOS high speed comparator. 21st IEEE European Test Symposium. (doi:10.1109/ETS.2016.7519300).
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Conference or Workshop Item
(Poster)
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e-pub ahead of print date: 25 July 2016
Venue - Dates:
21st IEEE European Test Symposium, 2016-05-27
Organisations:
Faculty of Physical Sciences and Engineering
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Local EPrints ID: 394523
URI: http://eprints.soton.ac.uk/id/eprint/394523
PURE UUID: 19ba5b10-6794-4102-8e47-62ce09b098e4
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Date deposited: 17 May 2016 16:51
Last modified: 15 Mar 2024 03:39
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Contributors
Author:
Illani Mohd Nawi
Author:
Basel Halak
Author:
Mark Zwolinski
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