This dataset supports the article entitled “Power Neutral Performance Scaling for Energy Harvesting MP-SoCs” accepted for publication in DATE 2017

Data Supporting Figures:

Fig. 1 - Experimentally obtained data showing the varying power output of a 250cm2 solar cell over the course of a day.
Fig. 4 - Board power consumption vs operating frequency for multiple core configurations, experimentally obtained for the ODROID XU4 embedded SoC platform.
Fig. 6 - Simulation showing operation of the control algorithm. Parameters Vwidth=0.2V; Vq=80mV; alpha=0.1Vs-1; and beta=0.12Vs-1.
Fig. 7 - Raytrace performance vs power consumption for the operating points in Fig. 4, obtained experimentally for the ODROID XU4 platform.
Fig. 10 - Latency to switch number of active CPU cores using hot-plugging and to change the operating frequency, obtained experimentally for the ODROID XU4 SoC platform.
Fig. 11 - System performance using a controlled variable voltage supply. Parameters Vwidth=335mV; Vq=190mV; alpha=0.238Vs-1; beta=0.633Vs-1
Fig. 12 - Vc over time whilst testing the system under full sun conditions.
Fig. 13 - IV characteristics of the PV array and the proportion of time spentat each operating voltage.
Fig. 14 - Available (estimated) and consumed power over the course of a day.
Fig. 15 - CPU usage over time, showing overhead of proposed approach.