Data-set supporting the article entitled "The Impact of BTI Aging on the Reliability of Level Shifters in Nano-scale CMOS Technology". Tab Table II: Data for TABLE II in the paper: Initial Delay and Power Figures of Level Shifters Tab Delay-comp: Data for Figure 7 in the paper: Time-dependent delay of the examined level shifter designs Tab Norm-delay: Data for Figure 8 in the paper: Time-dependent delay of a logic path with a level shifter and comparison with aging unaware analysis Tab power: Data for Figure 12 in the paper: Power of the examined level shifter designs