Towards autonomous testing of photonic integrated circuits
Towards autonomous testing of photonic integrated circuits
A crucial component of any large scale manufacturing line is the development of autonomous testing at the wafer scale. This work offers a solution through the fabrication of grating couplers in the silicon-on-insulator platform via ion implantation. The grating is subsequently erased after testing using laser annealing without affecting the optical performance of the photonic circuit. Experimental results show the possibility for the realisation of low loss, compact solutions which may revolutionise photonic wafer-scale testing. The process is CMOS compatible and can be implemented in other platforms to realise more complex systems such as multilayer photonics or programmable optical circuits.
Milošević, Milan
b28da945-84a5-4317-8896-6d9ea6a69589
Chen, Xia
64f6ab92-ca11-4489-8c03-52bc986209ae
Cao, Wei
5202fa2b-a471-45d4-84e9-9104dffdbbfc
Khokhar, Ali Z.
2eedd1cc-8ac5-4f8e-be25-930bd3eae396
Thomson, David J.
17c1626c-2422-42c6-98e0-586ae220bcda
Reed, Graham T.
ca08dd60-c072-4d7d-b254-75714d570139
20 February 2017
Milošević, Milan
b28da945-84a5-4317-8896-6d9ea6a69589
Chen, Xia
64f6ab92-ca11-4489-8c03-52bc986209ae
Cao, Wei
5202fa2b-a471-45d4-84e9-9104dffdbbfc
Khokhar, Ali Z.
2eedd1cc-8ac5-4f8e-be25-930bd3eae396
Thomson, David J.
17c1626c-2422-42c6-98e0-586ae220bcda
Reed, Graham T.
ca08dd60-c072-4d7d-b254-75714d570139
Milošević, Milan, Chen, Xia, Cao, Wei, Khokhar, Ali Z., Thomson, David J. and Reed, Graham T.
(2017)
Towards autonomous testing of photonic integrated circuits.
Reed, Graham T. and Knights, Andrew P.
(eds.)
In Proceedings of Spie: Silicon Photonics XII.
vol. 10108,
SPIE.
17 pp
.
(doi:10.1117/12.2251315).
Record type:
Conference or Workshop Item
(Paper)
Abstract
A crucial component of any large scale manufacturing line is the development of autonomous testing at the wafer scale. This work offers a solution through the fabrication of grating couplers in the silicon-on-insulator platform via ion implantation. The grating is subsequently erased after testing using laser annealing without affecting the optical performance of the photonic circuit. Experimental results show the possibility for the realisation of low loss, compact solutions which may revolutionise photonic wafer-scale testing. The process is CMOS compatible and can be implemented in other platforms to realise more complex systems such as multilayer photonics or programmable optical circuits.
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Published date: 20 February 2017
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Local EPrints ID: 413639
URI: http://eprints.soton.ac.uk/id/eprint/413639
PURE UUID: 79faffca-5eba-40c4-af32-ac8a92013117
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Date deposited: 31 Aug 2017 16:31
Last modified: 22 Nov 2024 18:18
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Contributors
Author:
Milan Milošević
Author:
Xia Chen
Author:
Wei Cao
Author:
Ali Z. Khokhar
Author:
David J. Thomson
Author:
Graham T. Reed
Editor:
Graham T. Reed
Editor:
Andrew P. Knights
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