This dataset supports the article entitled "Inter-cluster Thread-to-core Mapping and DVFS
on Heterogeneous Multi-cores" accepted for publication in IEEE Transactions on Multi-Scale Computing Systems, 2017.

Data Supporting Figures:

Fig. 1 - Execution time (seconds) and energy consumption (J) values by executing the Blackscholes application (from PARSEC benchmark [9]) with various core combinations, including inter-cluster, on ARM’s big.LITTLE architecture containing 4 big (B) and 4 LITTLE (L) cores

Fig. 2 - Variation in MRPI for individual (left) and concurrent (right) execution of multiple applications.

Fig. 5 - Design points representing performance and energy trade-off points for Blackscholes application.

Fig. 6 - Effect of adaptive sampling on energy and performance for various application scenarios.

Fig. 7 - Fig. 7. Comparison of proposed approach with reported approaches for single active application.

Fig. 8 - Fig. 8. MRPI and frequency at different time intervals of the application fr execution for various approaches.

Fig. 9 - Comparison of proposed approach with reported approaches for two active applications.

Fig. 10 - Comparison of proposed approach with reported approaches for three active applications.

Fig. 11 - Percentage of energy savings achieved by proposed ITM and ITMD respectively.

Fig. 12 - Performance improvement/degradation of the adopted approach and HMPP.

Fig. 13- Workload prediction using EWMA for three different application scenarios - one, two and three active applications (left to right).

Fig. 14- Run-time overhead of the proposed approach