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A dedicated bit-serial hardware neuron for massively-parallel neural networks in fast epilepsy diagnosis

A dedicated bit-serial hardware neuron for massively-parallel neural networks in fast epilepsy diagnosis
A dedicated bit-serial hardware neuron for massively-parallel neural networks in fast epilepsy diagnosis
This paper outlines the feasibility of detecting epilepsy though low-cost and low-energy dedicated hardware with bit-serial processing. The concept of a novel bit-serial data processing unit (DPU) is presented which implements the functionality of a complete neuron. The proposed approach has been tested using various network configurations and compared with related work. The proposed DPU uses only 24 Adaptive Logic Modules on an Altera Cyclone V FPGA. An array of these DPUs are controlled by a simple finite state machine. The proposed DPU allows the construction of complex hardware ANNs that can be implemented in portable equipment that suits the needs of a single epileptic patient in his or her daily activities to detect impending seizure events.
105-108
Kueh, Si Mon
75e25e81-0593-4fc0-9374-93a9cc88235d
Kazmierski, Tomasz
a97d7958-40c3-413f-924d-84545216092a
Kueh, Si Mon
75e25e81-0593-4fc0-9374-93a9cc88235d
Kazmierski, Tomasz
a97d7958-40c3-413f-924d-84545216092a

Kueh, Si Mon and Kazmierski, Tomasz (2017) A dedicated bit-serial hardware neuron for massively-parallel neural networks in fast epilepsy diagnosis. IEEE-NIH 2017 Special Topics Conference on Healthcare Innovations and Point-of-Care Technologies, Bethesda, United States. 06 - 08 Nov 2017. pp. 105-108 . (doi:10.1109/HIC.2017.8227595).

Record type: Conference or Workshop Item (Paper)

Abstract

This paper outlines the feasibility of detecting epilepsy though low-cost and low-energy dedicated hardware with bit-serial processing. The concept of a novel bit-serial data processing unit (DPU) is presented which implements the functionality of a complete neuron. The proposed approach has been tested using various network configurations and compared with related work. The proposed DPU uses only 24 Adaptive Logic Modules on an Altera Cyclone V FPGA. An array of these DPUs are controlled by a simple finite state machine. The proposed DPU allows the construction of complex hardware ANNs that can be implemented in portable equipment that suits the needs of a single epileptic patient in his or her daily activities to detect impending seizure events.

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More information

Accepted/In Press date: 26 September 2017
Published date: 2017
Venue - Dates: IEEE-NIH 2017 Special Topics Conference on Healthcare Innovations and Point-of-Care Technologies, Bethesda, United States, 2017-11-06 - 2017-11-08

Identifiers

Local EPrints ID: 416739
URI: https://eprints.soton.ac.uk/id/eprint/416739
PURE UUID: 5cc34b34-4aa2-4690-8572-9bf3fdb8a7c9

Catalogue record

Date deposited: 05 Jan 2018 17:31
Last modified: 13 Mar 2019 19:23

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Contributors

Author: Si Mon Kueh
Author: Tomasz Kazmierski

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