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Wafer scale pre-patterned ALD MoS2 FETs

Wafer scale pre-patterned ALD MoS2 FETs
Wafer scale pre-patterned ALD MoS2 FETs
Currently, 2D Transition metal dichalcogenides are emerging as the next generation semiconductor materials as they offer a direct bangap and therefore high on/off ratios, relatively high mobility, short-channel effects immunity, and near ideal subthreshold swings.

In this work we present a simplified wafer scale processing of MoS2 transistors that alleviates lithography and etching issues. The first step of the process is to grow a 90 nm dry thermal oxide on 6 inch wafers. The wafers are then immersed in a HCl solution to ensure the hydrophilicity of the surface. Atomic layer deposition (ALD) is used to grow MoO3 on the wafer. For this we use the metal organic precursor Bis(tert-butylimido)bis(dimethylamido)Mo and Ozone at 250 C. The wafers are then patterned in a conventional lithography process using the positive tone resist S1813. After the resist development the wafers are rinsed in deionised water and washed thoroughly. This step not only removes the remaining developer but also etches away the exposed MoO3. The photoresist is then removed by Acetone and finally rinsed with IPA. The wafers are further cleaned and oxidised in an asher by O2 plasma.

The patterned MoO3 wafers are then transferred in a furnace where they are annealed in H2S in two steps and at a low pressure. The first step is at substantially lower temperature than the melting point of MoO3 at 250C to eliminate vaporization of the material and for 1h whereas the second step is at 900C for 10 minutes to improve the crystallinity of the material. The pressure during the annealing is set at 4 Torr. After the H2S treatment the films are converted to MoS2 and since they are pre - patterned they are ready for metal deposition.

For metal contacts we use sputtering of 5nm of Ti and 150 nm of Au on top. For the top gate dielectric we use 40nm ALD deposited HfO2 which is deposited at the entire wafer. After the deposition of the top dielectric we open metal window contacts to the metal pads of the transistors using traditional lithography and a 20:1 BHF solution. Finally, top metal gate is deposited by sputtering and patterned by lift-off.

The novelty of this process lies within the pattern formation on MoO3 early in the process. This eliminates the issues involved with cross-linking of photoresist during MoS2 etching therefore simplifying and de-risking photoresist removal and reducing contamination. More importantly though as the patterns have already been formed before the high temperature conversion to MoS2 the layer stress has been released prior to the conversion. This results in higher quality films, free of pin holes, with fewer defects and of higher crystallinity, yielding superior electrical properties.
Devices are currently at the electrical characterisation stage from which results will reveal the performance of the MoS2 FETs made by this method. Ultimate goal of this work is to create a robust wafer scale process with high quality transistors for biosensing applications.
2D materials, MoS2
Zeimpekis, Ioannis
a2c354ec-3891-497c-adac-89b3a5d96af0
Aspiotis, Nikolaos
b32d40f9-0496-464e-bfcc-217f57ca9dc3
Morgan, Katrina
2b9605fc-ac61-4ae7-b5f1-b6e3d257701d
Huang, Chung-Che
825f7447-6d02-48f6-b95a-fa33da71f106
Hewak, Daniel
87c80070-c101-4f7a-914f-4cc3131e3db0
Zeimpekis, Ioannis
a2c354ec-3891-497c-adac-89b3a5d96af0
Aspiotis, Nikolaos
b32d40f9-0496-464e-bfcc-217f57ca9dc3
Morgan, Katrina
2b9605fc-ac61-4ae7-b5f1-b6e3d257701d
Huang, Chung-Che
825f7447-6d02-48f6-b95a-fa33da71f106
Hewak, Daniel
87c80070-c101-4f7a-914f-4cc3131e3db0

Zeimpekis, Ioannis, Aspiotis, Nikolaos, Morgan, Katrina, Huang, Chung-Che and Hewak, Daniel (2017) Wafer scale pre-patterned ALD MoS2 FETs. MRS Fall Meeting 2017, Hynes Convention Center, United States. 26 Nov - 01 Dec 2017.

Record type: Conference or Workshop Item (Other)

Abstract

Currently, 2D Transition metal dichalcogenides are emerging as the next generation semiconductor materials as they offer a direct bangap and therefore high on/off ratios, relatively high mobility, short-channel effects immunity, and near ideal subthreshold swings.

In this work we present a simplified wafer scale processing of MoS2 transistors that alleviates lithography and etching issues. The first step of the process is to grow a 90 nm dry thermal oxide on 6 inch wafers. The wafers are then immersed in a HCl solution to ensure the hydrophilicity of the surface. Atomic layer deposition (ALD) is used to grow MoO3 on the wafer. For this we use the metal organic precursor Bis(tert-butylimido)bis(dimethylamido)Mo and Ozone at 250 C. The wafers are then patterned in a conventional lithography process using the positive tone resist S1813. After the resist development the wafers are rinsed in deionised water and washed thoroughly. This step not only removes the remaining developer but also etches away the exposed MoO3. The photoresist is then removed by Acetone and finally rinsed with IPA. The wafers are further cleaned and oxidised in an asher by O2 plasma.

The patterned MoO3 wafers are then transferred in a furnace where they are annealed in H2S in two steps and at a low pressure. The first step is at substantially lower temperature than the melting point of MoO3 at 250C to eliminate vaporization of the material and for 1h whereas the second step is at 900C for 10 minutes to improve the crystallinity of the material. The pressure during the annealing is set at 4 Torr. After the H2S treatment the films are converted to MoS2 and since they are pre - patterned they are ready for metal deposition.

For metal contacts we use sputtering of 5nm of Ti and 150 nm of Au on top. For the top gate dielectric we use 40nm ALD deposited HfO2 which is deposited at the entire wafer. After the deposition of the top dielectric we open metal window contacts to the metal pads of the transistors using traditional lithography and a 20:1 BHF solution. Finally, top metal gate is deposited by sputtering and patterned by lift-off.

The novelty of this process lies within the pattern formation on MoO3 early in the process. This eliminates the issues involved with cross-linking of photoresist during MoS2 etching therefore simplifying and de-risking photoresist removal and reducing contamination. More importantly though as the patterns have already been formed before the high temperature conversion to MoS2 the layer stress has been released prior to the conversion. This results in higher quality films, free of pin holes, with fewer defects and of higher crystallinity, yielding superior electrical properties.
Devices are currently at the electrical characterisation stage from which results will reveal the performance of the MoS2 FETs made by this method. Ultimate goal of this work is to create a robust wafer scale process with high quality transistors for biosensing applications.

Full text not available from this repository.

More information

Published date: November 2017
Venue - Dates: MRS Fall Meeting 2017, Hynes Convention Center, United States, 2017-11-26 - 2017-12-01
Keywords: 2D materials, MoS2

Identifiers

Local EPrints ID: 417109
URI: http://eprints.soton.ac.uk/id/eprint/417109
PURE UUID: 548db8b5-d2c4-43da-b0e9-d3eb4307ad33
ORCID for Katrina Morgan: ORCID iD orcid.org/0000-0002-8600-4322
ORCID for Chung-Che Huang: ORCID iD orcid.org/0000-0003-3471-2463
ORCID for Daniel Hewak: ORCID iD orcid.org/0000-0002-2093-5773

Catalogue record

Date deposited: 19 Jan 2018 17:30
Last modified: 18 Feb 2021 17:15

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