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A Multi-core architecture for a hybrid information system

A Multi-core architecture for a hybrid information system
A Multi-core architecture for a hybrid information system
This paper demonstrates our proposed Multi-core architecture for a hybrid information system (HIS) with the related work, system design, theories, experiments, analysis and discussion presented. Different designs on clusters, communication between different types of chips and clusters and network queuing methods have been described. Our aim is to achieve quality, reliability and resilience and to demonstrate it, our emphasis is on latency with messages communicated in our system – understand how it happens, what can trigger its increase, and then experiment with different types of focuses, including under Store-and-Forward Flow Control method, Wormhole flow control method, cluster size and message size to get a better understanding. Our analysis allows us to reduce latency and avoid its sharp increase. We justify our research contributions, particularly in the area of “traffic analysis and management” and “performance analysis of transmission control” of the HIS systems.
0045-7906
Hamid, Norhazlina
22e1e955-20ef-4d80-92e3-1d2e8813f334
Chang, Victor
8327af45-7ad7-4f35-b614-cc4df8118bb5
Walters, Robert John
7b8732fb-3083-4f4d-844e-85a29daaa2c1
Wills, Gary Brian
3a594558-6921-4e82-8098-38cd8d4e8aa0
Hamid, Norhazlina
22e1e955-20ef-4d80-92e3-1d2e8813f334
Chang, Victor
8327af45-7ad7-4f35-b614-cc4df8118bb5
Walters, Robert John
7b8732fb-3083-4f4d-844e-85a29daaa2c1
Wills, Gary Brian
3a594558-6921-4e82-8098-38cd8d4e8aa0

Hamid, Norhazlina, Chang, Victor, Walters, Robert John and Wills, Gary Brian (2017) A Multi-core architecture for a hybrid information system. Computers & Electrical Engineering. (doi:10.1016/j.compeleceng.2017.12.020).

Record type: Article

Abstract

This paper demonstrates our proposed Multi-core architecture for a hybrid information system (HIS) with the related work, system design, theories, experiments, analysis and discussion presented. Different designs on clusters, communication between different types of chips and clusters and network queuing methods have been described. Our aim is to achieve quality, reliability and resilience and to demonstrate it, our emphasis is on latency with messages communicated in our system – understand how it happens, what can trigger its increase, and then experiment with different types of focuses, including under Store-and-Forward Flow Control method, Wormhole flow control method, cluster size and message size to get a better understanding. Our analysis allows us to reduce latency and avoid its sharp increase. We justify our research contributions, particularly in the area of “traffic analysis and management” and “performance analysis of transmission control” of the HIS systems.

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A Multi-core architecture for a hybrid information system - Accepted Manuscript
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Accepted/In Press date: 6 December 2017
e-pub ahead of print date: 20 December 2017

Identifiers

Local EPrints ID: 417263
URI: http://eprints.soton.ac.uk/id/eprint/417263
ISSN: 0045-7906
PURE UUID: 29aade43-25d1-48c3-bf02-4100fa42a3cf
ORCID for Gary Brian Wills: ORCID iD orcid.org/0000-0001-5771-4088

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Date deposited: 26 Jan 2018 17:30
Last modified: 18 Feb 2021 16:46

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Contributors

Author: Norhazlina Hamid
Author: Victor Chang
Author: Robert John Walters

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