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A Fault-Tolerant Routing Algorithm Using Tunnels in Fault Blocks for Network-on-Chip

A Fault-Tolerant Routing Algorithm Using Tunnels in Fault Blocks for Network-on-Chip
A Fault-Tolerant Routing Algorithm Using Tunnels in Fault Blocks for Network-on-Chip

In 2D mesh Network on Chips (NoCs), fault-tolerant algorithms usually deactivate healthy nodes to form rectangular or convex fault blocks. However, the deactivated nodes can possibly form an available tunnel in a faulty block. We propose a method to discover these tunnels, and propose a fault-tolerant routing algorithm to route messages through such paths such that the overall communication performance is improved. In addition, the algorithm is deadlock-free by prohibiting some turns. Simulation results demonstrate that the reuse of the sacrificed nodes in fault blocks can significantly reduce the average message latency.

Fault block, Fault-tolerant routing, Mesh, Network on Chips, Tunnel
0218-1266
Wang, Ling
e9f757b7-258e-4e3e-b359-2195a04bad19
Mak, Terrence
0f90ac88-f035-4f92-a62a-7eb92406ea53
Wang, Ling
e9f757b7-258e-4e3e-b359-2195a04bad19
Mak, Terrence
0f90ac88-f035-4f92-a62a-7eb92406ea53

Wang, Ling and Mak, Terrence (2018) A Fault-Tolerant Routing Algorithm Using Tunnels in Fault Blocks for Network-on-Chip. Journal of Circuits, Systems and Computers, 27 (2), [1850022]. (doi:10.1142/S0218126618500226).

Record type: Article

Abstract

In 2D mesh Network on Chips (NoCs), fault-tolerant algorithms usually deactivate healthy nodes to form rectangular or convex fault blocks. However, the deactivated nodes can possibly form an available tunnel in a faulty block. We propose a method to discover these tunnels, and propose a fault-tolerant routing algorithm to route messages through such paths such that the overall communication performance is improved. In addition, the algorithm is deadlock-free by prohibiting some turns. Simulation results demonstrate that the reuse of the sacrificed nodes in fault blocks can significantly reduce the average message latency.

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More information

Accepted/In Press date: 8 May 2017
e-pub ahead of print date: 22 June 2017
Published date: 1 February 2018
Keywords: Fault block, Fault-tolerant routing, Mesh, Network on Chips, Tunnel

Identifiers

Local EPrints ID: 417450
URI: http://eprints.soton.ac.uk/id/eprint/417450
ISSN: 0218-1266
PURE UUID: 505efe91-186c-4f89-9980-fb832cd3ceba

Catalogue record

Date deposited: 31 Jan 2018 17:30
Last modified: 15 Mar 2024 18:10

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Contributors

Author: Ling Wang
Author: Terrence Mak

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