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Single-stage switched-capacitor module (S3CM) topology for cascaded multilevel inverter

Single-stage switched-capacitor module (S3CM) topology for cascaded multilevel inverter
Single-stage switched-capacitor module (S3CM) topology for cascaded multilevel inverter

A two-stage switched-capacitor based multilevel inverter possesses a drawback such that switches in the second stage (i.e. H-bridge) endure higher voltage stress. To resolve this problem, this letter proposes a single-stage switched-capacitor module (S3CM) topology for cascaded multilevel inverter which ensures the peak inverse voltage across all switches within the dc source voltage. Nine voltage levels can be generated with only one dc source and two incorporated capacitors. Hence, the number of isolated dc sources are significantly reduced compared to cascaded H-bridge. In addition, voltage boosting gain of two is achieved. A comparative analysis against the recent topology reveals that the proposed S3CM topology achieves switch count reduction. The operation of the proposed topology is validated through circuit analysis followed by experimental results of a single module (9-level) prototype.

Boosting, Capacitors, Cascaded multilevel inverter, Inverters, Prototypes, single-stage, Stress, switchedcapacitor module, Switches, Topology
0885-8993
1-4
Lee, Sze Sing
47f36964-db27-4f5e-a4d3-4b0ba78ce29e
Lee, Sze Sing
47f36964-db27-4f5e-a4d3-4b0ba78ce29e

Lee, Sze Sing (2018) Single-stage switched-capacitor module (S3CM) topology for cascaded multilevel inverter. IEEE Transactions on Power Electronics, 1-4. (doi:10.1109/TPEL.2018.2805685).

Record type: Article

Abstract

A two-stage switched-capacitor based multilevel inverter possesses a drawback such that switches in the second stage (i.e. H-bridge) endure higher voltage stress. To resolve this problem, this letter proposes a single-stage switched-capacitor module (S3CM) topology for cascaded multilevel inverter which ensures the peak inverse voltage across all switches within the dc source voltage. Nine voltage levels can be generated with only one dc source and two incorporated capacitors. Hence, the number of isolated dc sources are significantly reduced compared to cascaded H-bridge. In addition, voltage boosting gain of two is achieved. A comparative analysis against the recent topology reveals that the proposed S3CM topology achieves switch count reduction. The operation of the proposed topology is validated through circuit analysis followed by experimental results of a single module (9-level) prototype.

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08290976 - Accepted Manuscript
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More information

Accepted/In Press date: 12 February 2018
e-pub ahead of print date: 13 February 2018
Keywords: Boosting, Capacitors, Cascaded multilevel inverter, Inverters, Prototypes, single-stage, Stress, switchedcapacitor module, Switches, Topology

Identifiers

Local EPrints ID: 421819
URI: http://eprints.soton.ac.uk/id/eprint/421819
ISSN: 0885-8993
PURE UUID: 22ed00d3-ac09-464c-a2a0-87e9f4afc9b7
ORCID for Sze Sing Lee: ORCID iD orcid.org/0000-0003-2455-5783

Catalogue record

Date deposited: 28 Jun 2018 16:30
Last modified: 14 Sep 2021 17:23

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