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Special session on bringing cores closer together: the wireless revolution in on-chip communication

Special session on bringing cores closer together: the wireless revolution in on-chip communication
Special session on bringing cores closer together: the wireless revolution in on-chip communication

The emerging field of NoC with Wireless interconnects is actively being pursued by a number of researchers worldwide, from a variety of different perspectives, ranging from very high levels of abstraction (e.g., system architecture) to very low levels (physical layer and transceiver design). Successful solutions will likely adopt and encompass elements from all or at least several levels of abstraction and rely on interdisciplinary concepts from multi-core architectures, integrated circuits, 3D ICs, digital communications, complex networks, and optimization techniques. This special session will provide a timely and insightful journey into various challenges and emerging solutions regarding the design of future NoC architectures. By scope and contents, this special session represents an engaging proposition to attendees belonging to both academia and industry.

1
IEEE
Mak, Terrence
0f90ac88-f035-4f92-a62a-7eb92406ea53
Matsutani, Hiroki
578b55ce-4204-4750-8e2c-b43ce8ca7b47
Pande, Partha Pratim
4ec841ae-b714-4b31-beab-877d3dd2f383
Mak, Terrence
0f90ac88-f035-4f92-a62a-7eb92406ea53
Matsutani, Hiroki
578b55ce-4204-4750-8e2c-b43ce8ca7b47
Pande, Partha Pratim
4ec841ae-b714-4b31-beab-877d3dd2f383

Mak, Terrence, Matsutani, Hiroki and Pande, Partha Pratim (2018) Special session on bringing cores closer together: the wireless revolution in on-chip communication. In Proceedings - 2018 IEEE 36th VLSI Test Symposium, VTS 2018. vol. 2018-April, IEEE. p. 1 . (doi:10.1109/VTS.2018.8368638).

Record type: Conference or Workshop Item (Paper)

Abstract

The emerging field of NoC with Wireless interconnects is actively being pursued by a number of researchers worldwide, from a variety of different perspectives, ranging from very high levels of abstraction (e.g., system architecture) to very low levels (physical layer and transceiver design). Successful solutions will likely adopt and encompass elements from all or at least several levels of abstraction and rely on interdisciplinary concepts from multi-core architectures, integrated circuits, 3D ICs, digital communications, complex networks, and optimization techniques. This special session will provide a timely and insightful journey into various challenges and emerging solutions regarding the design of future NoC architectures. By scope and contents, this special session represents an engaging proposition to attendees belonging to both academia and industry.

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More information

Published date: 29 May 2018
Venue - Dates: 36th IEEE VLSI Test Symposium, VTS 2018, , San Francisco, United States, 2018-04-22 - 2018-04-25

Identifiers

Local EPrints ID: 421823
URI: http://eprints.soton.ac.uk/id/eprint/421823
PURE UUID: 262b4631-4072-42ab-9ae1-6e2e79c6fc3c

Catalogue record

Date deposited: 29 Jun 2018 16:30
Last modified: 15 Mar 2024 20:39

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Contributors

Author: Terrence Mak
Author: Hiroki Matsutani
Author: Partha Pratim Pande

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