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A symmetrical cascaded compact-module multilevel inverter (CCM-MLI) with pulsewidth modulation

A symmetrical cascaded compact-module multilevel inverter (CCM-MLI) with pulsewidth modulation
A symmetrical cascaded compact-module multilevel inverter (CCM-MLI) with pulsewidth modulation
Cascaded H-bridge (CHB) multilevel inverters (MLIs) have been widely used for power electronics systems. While high-voltage blocking across power switches is not a constraint for low voltage applications, the research trend has been oriented to the design of more compact module topologies as an alternative for CHB. Despite the generation of more voltage levels with reduced switch count, the existing module topologies in recent literature take no account of the freewheeling current path during dead-time, thus, inducing multistep jumps in voltage levels and giving rise to undesirable voltage spikes. Addressing this concern, this paper proposes two symmetrical compact-module topologies for cascaded MLI, where freewheeling current path during dead-time is provided for smooth transition between voltage levels to prevent voltage spikes. The proposed 7-level and 13-level compact-modules demonstrated low number of conducting switches for all voltage levels. Comprehensive analysis and comparison with the latest module topologies are conducted. To validate the operation of the proposed compact-module topologies, simulation and experimental results are presented.
0278-0046
4631-4639
Lee, Sze Sing
47f36964-db27-4f5e-a4d3-4b0ba78ce29e
Sidorov, Michail
0a2501d4-8a93-4715-aa5e-3c5354761645
Nik Idris, Nik Rumzi
4027a498-06d9-4cf2-ab94-8b387ceee625
Heng, Yeh En
9db23da1-aa02-4d00-b619-f6ffb8b85d7a
Lee, Sze Sing
47f36964-db27-4f5e-a4d3-4b0ba78ce29e
Sidorov, Michail
0a2501d4-8a93-4715-aa5e-3c5354761645
Nik Idris, Nik Rumzi
4027a498-06d9-4cf2-ab94-8b387ceee625
Heng, Yeh En
9db23da1-aa02-4d00-b619-f6ffb8b85d7a

Lee, Sze Sing, Sidorov, Michail, Nik Idris, Nik Rumzi and Heng, Yeh En (2018) A symmetrical cascaded compact-module multilevel inverter (CCM-MLI) with pulsewidth modulation. IEEE Transactions on Industrial Electronics, 65 (6), 4631-4639. (doi:10.1109/TIE.2017.2772209).

Record type: Article

Abstract

Cascaded H-bridge (CHB) multilevel inverters (MLIs) have been widely used for power electronics systems. While high-voltage blocking across power switches is not a constraint for low voltage applications, the research trend has been oriented to the design of more compact module topologies as an alternative for CHB. Despite the generation of more voltage levels with reduced switch count, the existing module topologies in recent literature take no account of the freewheeling current path during dead-time, thus, inducing multistep jumps in voltage levels and giving rise to undesirable voltage spikes. Addressing this concern, this paper proposes two symmetrical compact-module topologies for cascaded MLI, where freewheeling current path during dead-time is provided for smooth transition between voltage levels to prevent voltage spikes. The proposed 7-level and 13-level compact-modules demonstrated low number of conducting switches for all voltage levels. Comprehensive analysis and comparison with the latest module topologies are conducted. To validate the operation of the proposed compact-module topologies, simulation and experimental results are presented.

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More information

Accepted/In Press date: 22 October 2017
e-pub ahead of print date: 13 November 2017
Published date: June 2018

Identifiers

Local EPrints ID: 423005
URI: http://eprints.soton.ac.uk/id/eprint/423005
ISSN: 0278-0046
PURE UUID: b8e74dd8-898e-47d5-bbf5-066ab4df2977
ORCID for Sze Sing Lee: ORCID iD orcid.org/0000-0003-2455-5783

Catalogue record

Date deposited: 09 Aug 2018 16:30
Last modified: 14 Sep 2021 17:34

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Contributors

Author: Sze Sing Lee ORCID iD
Author: Michail Sidorov
Author: Nik Rumzi Nik Idris
Author: Yeh En Heng

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