An MF energy harvesting receiver with slow QPSK control data demodulator for wide area low duty cycle applications

Lee, T., Kennedy, H.R.B., Bodnar, R.A. and Redman-White, W. (2018) An MF energy harvesting receiver with slow QPSK control data demodulator for wide area low duty cycle applications. In ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference. IEEE. pp. 278-281 . (doi:10.1109/ESSCIRC.2018.8494311).

Abstract

A receiver circuit is presented for use providing power and control for widely deployed sensor nodes, where the source of the power and control data are delivered by a very loosely-coupled medium frequency (MF) magnetic link. The receiver consists of a low start-up voltage rectifier, an inductor-capacitor (LC) antenna tuning circuit, an ultra-low power phase shift-keying (PSK) data demodulator, together with a power management unit (PMU). In such an application, accurately tuned high quality factor (Q) receiving coils are essential to maximise the received voltage, and hence the operating range for reliable startup. Slow QPSK data modulation is used for control and the timing needed for very low duty cycle networks. The receiver circuit occupies 0.89mm² in a 0.18μm CMOS process with N and P thresholds of 0.355V and-0.405V respectively. The rectifier can start reliably with an input 220mV below the MOS thresholds (V_th). With an equivalent load of 100k Ω, the rectifier power conversion efficiency (PCE) peaks at 42 % and the dynamic reconfiguration maintains this above 25% up to 700mV input. The sub-sampling demodulator architecture is specifically designed to deal with the slow phase changes in the received signal resulting from the narrow receive bandwidth. The demodulator consumes 3.62μA from an internal 0.63V supply, achieving 10^-6 bit-error-rate (BER) at 15.5kbps with a 1MHz carrier and an antenna Q of 10, while consuming 2.28μW.

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