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Practical implementation of memristor-based threshold logic gate

Practical implementation of memristor-based threshold logic gate
Practical implementation of memristor-based threshold logic gate
Current advances in emerging memory technologies enable novel and unconventional computing architectures for high-performance and low-power electronic systems, capable of carrying out massively parallel operations at the edge. One emerging technology, ReRAM, also known to belong in the family of memristors (memory resistors), is gathering attention due to its attractive features for logic and in-memory computing; benefits which follow from its technological attributes, such as nanoscale dimensions, low power operation, and multi-state programming. At the same time, design with CMOS is quickly reaching its physical and functional limitations, and further research towards novel logic families, such as Threshold Logic Gates (TLGs) is scoped. In this paper, we introduce a physical implementation of a memristor-based current-mode TLG (MCMTLG) circuit and validate its design and operation through multiple experimental setups. We demonstrate 2-input, 3-input, and 4-input MCMTLG configurations and showcase their reconfiguration capability. This is achieved by varying memristive weights arbitrarily for shaping the classification decision boundary, thus showing promise as an alternative hardware-friendly implementation of Artificial Neural Networks (ANNs). Through the employment of real memristor devices as the equivalent of synaptic weights in TLGs, we are realizing components that can be used towards an in-silico classifier.
1549-8328
3041-3051
Papandroulidakis, Georgios
518ddb08-ebeb-4026-829d-7a3db4fd3275
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Khiat, Ali
bf549ddd-5356-4a7d-9c12-eb6c0d904050
Merrett, Geoff
89b3a696-41de-44c3-89aa-b0aa29f54020
Prodromakis, Themis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Papandroulidakis, Georgios
518ddb08-ebeb-4026-829d-7a3db4fd3275
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Khiat, Ali
bf549ddd-5356-4a7d-9c12-eb6c0d904050
Merrett, Geoff
89b3a696-41de-44c3-89aa-b0aa29f54020
Prodromakis, Themis
d58c9c10-9d25-4d22-b155-06c8437acfbf

Papandroulidakis, Georgios, Serb, Alexantrou, Khiat, Ali, Merrett, Geoff and Prodromakis, Themis (2019) Practical implementation of memristor-based threshold logic gate. IEEE Transactions on Circuits and Systems I: Regular Papers, 66 (8), 3041-3051. (doi:10.1109/TCSI.2019.2902475).

Record type: Article

Abstract

Current advances in emerging memory technologies enable novel and unconventional computing architectures for high-performance and low-power electronic systems, capable of carrying out massively parallel operations at the edge. One emerging technology, ReRAM, also known to belong in the family of memristors (memory resistors), is gathering attention due to its attractive features for logic and in-memory computing; benefits which follow from its technological attributes, such as nanoscale dimensions, low power operation, and multi-state programming. At the same time, design with CMOS is quickly reaching its physical and functional limitations, and further research towards novel logic families, such as Threshold Logic Gates (TLGs) is scoped. In this paper, we introduce a physical implementation of a memristor-based current-mode TLG (MCMTLG) circuit and validate its design and operation through multiple experimental setups. We demonstrate 2-input, 3-input, and 4-input MCMTLG configurations and showcase their reconfiguration capability. This is achieved by varying memristive weights arbitrarily for shaping the classification decision boundary, thus showing promise as an alternative hardware-friendly implementation of Artificial Neural Networks (ANNs). Through the employment of real memristor devices as the equivalent of synaptic weights in TLGs, we are realizing components that can be used towards an in-silico classifier.

Text
Practical Implementation of Memristor-Based Threshold Logic Gate - Accepted Manuscript
Restricted to Repository staff only until 16 February 2020.
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More information

Accepted/In Press date: 16 February 2019
e-pub ahead of print date: 22 March 2019
Published date: August 2019

Identifiers

Local EPrints ID: 431451
URI: https://eprints.soton.ac.uk/id/eprint/431451
ISSN: 1549-8328
PURE UUID: d509d07d-a2fc-4648-8fbb-3196a36819d2
ORCID for Geoff Merrett: ORCID iD orcid.org/0000-0003-4980-3894
ORCID for Themis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

Catalogue record

Date deposited: 04 Jun 2019 16:30
Last modified: 02 Aug 2019 00:33

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