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An analogue-domain, switch-capacitor-based arithmetic-logic unit

An analogue-domain, switch-capacitor-based arithmetic-logic unit
An analogue-domain, switch-capacitor-based arithmetic-logic unit

The continuous maturation of novel nanoelectronic devices exhibiting finely tuneable resistive switching is rekindling interest in analogue-domain computation. Regardless of domain, a useful computational module is the arithmetic-logic unit (ALU), which is capable of performing one or more fundamental mathematical operations (typical example: addition and subtraction). In this work we report on a design for an analogue ALU (aAL U) capable of performing barrel addition and subtraction (i.e. ADD/SUB in modular arithmetic). The circuit only requires 5 minimum-size transistors and 1 capacitor. We show that our aALU is in principle capable of handling 5 bits of information using a single input/output wire. Core power dissipation per operation is estimated to peak at ~ 59 f J (input operand-dependent) in TSMC's 65 nm technology.

2158-1525
IEEE
Serb, Alexander
30f5ec26-f51d-42b3-85fd-0325a27a792c
Prodromakis, Themis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Serb, Alexander
30f5ec26-f51d-42b3-85fd-0325a27a792c
Prodromakis, Themis
d58c9c10-9d25-4d22-b155-06c8437acfbf

Serb, Alexander and Prodromakis, Themis (2019) An analogue-domain, switch-capacitor-based arithmetic-logic unit. In 2019 IEEE International Symposium on Circuits and Systems (ISCAS). vol. 2019-May, IEEE. 5 pp . (doi:10.1109/ISCAS.2019.8702070).

Record type: Conference or Workshop Item (Paper)

Abstract

The continuous maturation of novel nanoelectronic devices exhibiting finely tuneable resistive switching is rekindling interest in analogue-domain computation. Regardless of domain, a useful computational module is the arithmetic-logic unit (ALU), which is capable of performing one or more fundamental mathematical operations (typical example: addition and subtraction). In this work we report on a design for an analogue ALU (aAL U) capable of performing barrel addition and subtraction (i.e. ADD/SUB in modular arithmetic). The circuit only requires 5 minimum-size transistors and 1 capacitor. We show that our aALU is in principle capable of handling 5 bits of information using a single input/output wire. Core power dissipation per operation is estimated to peak at ~ 59 f J (input operand-dependent) in TSMC's 65 nm technology.

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More information

Published date: 1 May 2019
Venue - Dates: 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, Sapporo, Japan, 2019-05-26 - 2019-05-29

Identifiers

Local EPrints ID: 431815
URI: https://eprints.soton.ac.uk/id/eprint/431815
ISSN: 2158-1525
PURE UUID: 7d39bc68-8cdd-4795-8cac-2243be57a7f6
ORCID for Themis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

Catalogue record

Date deposited: 19 Jun 2019 16:30
Last modified: 20 Jul 2019 00:38

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