A 10.8pJ/bit pulse-position inductive transceiver for low-energy wireless 3D integration
A 10.8pJ/bit pulse-position inductive transceiver for low-energy wireless 3D integration
This paper presents a low-energy die-to-die inductive transceiver for use within a stacked 3D-IC. The design is implemented in a 2-tier 0.35µm CMOS test chip and demonstrates vertical communication at a rate of 133Mbps/channel, across a distance of 110µm, whilst consuming only 10.8pJ per transmitted bit. This represents a 5.3x improvement when compared to state-of-the-art inductive transceivers by combining: (1) 3-ary pulse-position modulation, to encode data in terms of the latency between sequential pulses (rather than using one-to-one pulsecode mappings), and (2) A tunable current driver circuit to adjust the transmit current dynamically based on the quality of the stacked die assembly.
Fletcher, Benjamin, James
b9ee2f3f-f125-47df-a73e-e61c0404d4c9
Das, Shidhartha
c1e693af-261c-495d-8f0f-227396df0e3b
Mak, Terrence
0f90ac88-f035-4f92-a62a-7eb92406ea53
September 2019
Fletcher, Benjamin, James
b9ee2f3f-f125-47df-a73e-e61c0404d4c9
Das, Shidhartha
c1e693af-261c-495d-8f0f-227396df0e3b
Mak, Terrence
0f90ac88-f035-4f92-a62a-7eb92406ea53
Fletcher, Benjamin, James, Das, Shidhartha and Mak, Terrence
(2019)
A 10.8pJ/bit pulse-position inductive transceiver for low-energy wireless 3D integration.
In IEEE European Solid-State Circuits Conference (ESSCIRC).
vol. 49,
IEEE.
4 pp
.
Record type:
Conference or Workshop Item
(Paper)
Abstract
This paper presents a low-energy die-to-die inductive transceiver for use within a stacked 3D-IC. The design is implemented in a 2-tier 0.35µm CMOS test chip and demonstrates vertical communication at a rate of 133Mbps/channel, across a distance of 110µm, whilst consuming only 10.8pJ per transmitted bit. This represents a 5.3x improvement when compared to state-of-the-art inductive transceivers by combining: (1) 3-ary pulse-position modulation, to encode data in terms of the latency between sequential pulses (rather than using one-to-one pulsecode mappings), and (2) A tunable current driver circuit to adjust the transmit current dynamically based on the quality of the stacked die assembly.
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Published date: September 2019
Venue - Dates:
49th IEEE European Solid-State Circuits Conference (ESSCIRC), , Krakow, Poland, 2019-09-23 - 2019-09-26
Identifiers
Local EPrints ID: 432501
URI: http://eprints.soton.ac.uk/id/eprint/432501
PURE UUID: fb6cc8cc-d450-4bcc-9bd7-920350b9b781
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Date deposited: 17 Jul 2019 16:30
Last modified: 16 Mar 2024 08:01
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Contributors
Author:
Benjamin, James Fletcher
Author:
Shidhartha Das
Author:
Terrence Mak
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