This dataset supports the article entitled "AdaMD: Adaptive Mapping and DVFS for Energy-efficient Heterogeneous Multi-cores" accepted for publication in IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, July 2019.

Dataset DOI: https://doi.org/10.5258/SOTON/D1041

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Person responsible for collecting the data: Karunakar Reddy Basireddy, krb1g15@ecs.soton.ac.uk

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Date of data collection: 01/11/2018 to 07/01/2019 

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Licenses/restrictions placed on the data: CC-BY/Public - No restriction

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Links to publications that cite or use the data: xxxxx 

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Data Supporting Figures:

Fig. 3 - Energy and execution time at different resource combinations of big (B) and LITTLE (L) for the application Bodytrack from PARSEC [18], executing on the Odroid-XU3.

Fig. 4 - Box plot of absolute percentage error in IPC prediction by our performance model for different number of decision stumps used in the additive regression, showing the median, lower quartile, upper quartile and outliers – (a) Estimating the performance of LITTLE given the information about the big core (b) Estimating the performance of big given the information about the LITTLE core.

Fig. 5 - Percentage improvement in energy consumption achieved by the AdaMD compared to reported approaches for single and concurrent applications.

Fig. 6 - Energy savings achieved by the AdaMD with respect to different approaches for one and two applications added dynamically to the system while an application is executing.

Fig. 8 - Scalability of AdaMD for different core configurations of big (b) and LITTLE (L) cores: energy savings achieved by AdaMD with respect to ITMD.

Fig. 9 - Evaluation of various approaches in meeting application performance constraints.