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A phase lag index hardware calculation for real-time electroencephalography studies

A phase lag index hardware calculation for real-time electroencephalography studies
A phase lag index hardware calculation for real-time electroencephalography studies
Among the different techniques used for the analysis of electroencephalograms, the phase lag index has become an important method for the calculation of the functional brain connectivity. Currently, this method is implemented offline due to its high computational complexity restricting it from real-time applications that would require an online neurofeedback. In this paper, we propose a new architecture to calculate the phase lag index of electroencephalograms in real-time. As a proof of concept, a 32 bit and 16-channel system running at 188.32 MHz was synthesized on a Stratix IV GX FPGA. The system was tested and the simulations demonstrated that the system could perform the calculation of the Phase lag index at least 66 times faster than the MATLAB software with a mean square error of less than 5.72e-6.
IEEE
Gutierrez Nuno, Rafael, Angel
0d732031-1fc9-40bf-b91f-3af547ea9b54
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd
Gutierrez Nuno, Rafael, Angel
0d732031-1fc9-40bf-b91f-3af547ea9b54
Maharatna, Koushik
93bef0a2-e011-4622-8c56-5447da4cd5dd

Gutierrez Nuno, Rafael, Angel and Maharatna, Koushik (2019) A phase lag index hardware calculation for real-time electroencephalography studies. In 2019 41th Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC). IEEE.. (doi:10.1109/EMBC.2019.8857652).

Record type: Conference or Workshop Item (Paper)

Abstract

Among the different techniques used for the analysis of electroencephalograms, the phase lag index has become an important method for the calculation of the functional brain connectivity. Currently, this method is implemented offline due to its high computational complexity restricting it from real-time applications that would require an online neurofeedback. In this paper, we propose a new architecture to calculate the phase lag index of electroencephalograms in real-time. As a proof of concept, a 32 bit and 16-channel system running at 188.32 MHz was synthesized on a Stratix IV GX FPGA. The system was tested and the simulations demonstrated that the system could perform the calculation of the Phase lag index at least 66 times faster than the MATLAB software with a mean square error of less than 5.72e-6.

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More information

Accepted/In Press date: 10 April 2019
e-pub ahead of print date: 7 October 2019
Venue - Dates: 41st International Engineering in Medicine and Biology Conference (EMBC 2019), Germany, 2019-07-23 - 2019-07-27

Identifiers

Local EPrints ID: 438366
URI: http://eprints.soton.ac.uk/id/eprint/438366
PURE UUID: 1f0914e4-92d3-417e-be91-b6c33942e6b2
ORCID for Rafael, Angel Gutierrez Nuno: ORCID iD orcid.org/0000-0002-8226-4725

Catalogue record

Date deposited: 06 Mar 2020 17:34
Last modified: 07 Oct 2020 02:14

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Contributors

Author: Rafael, Angel Gutierrez Nuno ORCID iD
Author: Koushik Maharatna

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