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Techniques and circuits for ultra-efficient energy harvesting sensor nodes

Techniques and circuits for ultra-efficient energy harvesting sensor nodes
Techniques and circuits for ultra-efficient energy harvesting sensor nodes
Sensor nodes play increasingly important role in various enterprises like agriculture, transport, defence etc. As the number of sensor nodes increase, their energy consumption, running and maintenance costs become detrimental to their implementation. Energy harvesting is an alternative to tethered or battery-powered sensor nodes which holds the promise of long-term sustainable operation. The energy available however, is limited and decreases further as sensor nodes become smaller. A small size also calls for tighter and possibly, monolithic integration. The limited available energy and small form-factor necessitates high energy efficiency in sensor nodes that must be guaranteed at design time. While integrated circuit (IC) design uses well-characterized device models for simulation, energy harvesters rarely have accurate models upon which to draw for circuit design. This research explores development of models for small cm2 photovoltaic cells by first characterizing them in real-world conditions and develop simulation models to enable IC design. The models are then used to investigate power conversion circuits and techniques for improving energy efficiency of sensor nodes. In this thesis, a compact and low-cost characterization scheme is used to develop a simulation model for photovoltaic cell which shows good correlation with measurements. The results of this work show the potential to improve sensor node design margining by as much as 16×. Holistic system solutions are then explored to maximize utilization of harvested energy with efficient power conversion resulting in a 30% increase in computation cycles in the sensor node. Ultra-low-power rail monitor and oscillator circuits are also presented. The rail monitor exploits state-awareness to provide the best-reported balance in response speed and power consumption. The oscillator uses sub-cycle comparator duty-cycling to provide the lowest energy per cycle in the smallest area while exhibiting comparable line and temperature sensitivities. This research has resulted two journals, three peerreviewed conference papers and three granted patents
University of Southampton
Savanth, Parameshwarappa Anand Kumar
57b60ac8-bbb6-4517-9d5e-668d82500190
Savanth, Parameshwarappa Anand Kumar
57b60ac8-bbb6-4517-9d5e-668d82500190
Weddell, Alexander
3d8c4d63-19b1-4072-a779-84d487fd6f03

Savanth, Parameshwarappa Anand Kumar (2021) Techniques and circuits for ultra-efficient energy harvesting sensor nodes. University of Southampton, Doctoral Thesis, 201pp.

Record type: Thesis (Doctoral)

Abstract

Sensor nodes play increasingly important role in various enterprises like agriculture, transport, defence etc. As the number of sensor nodes increase, their energy consumption, running and maintenance costs become detrimental to their implementation. Energy harvesting is an alternative to tethered or battery-powered sensor nodes which holds the promise of long-term sustainable operation. The energy available however, is limited and decreases further as sensor nodes become smaller. A small size also calls for tighter and possibly, monolithic integration. The limited available energy and small form-factor necessitates high energy efficiency in sensor nodes that must be guaranteed at design time. While integrated circuit (IC) design uses well-characterized device models for simulation, energy harvesters rarely have accurate models upon which to draw for circuit design. This research explores development of models for small cm2 photovoltaic cells by first characterizing them in real-world conditions and develop simulation models to enable IC design. The models are then used to investigate power conversion circuits and techniques for improving energy efficiency of sensor nodes. In this thesis, a compact and low-cost characterization scheme is used to develop a simulation model for photovoltaic cell which shows good correlation with measurements. The results of this work show the potential to improve sensor node design margining by as much as 16×. Holistic system solutions are then explored to maximize utilization of harvested energy with efficient power conversion resulting in a 30% increase in computation cycles in the sensor node. Ultra-low-power rail monitor and oscillator circuits are also presented. The rail monitor exploits state-awareness to provide the best-reported balance in response speed and power consumption. The oscillator uses sub-cycle comparator duty-cycling to provide the lowest energy per cycle in the smallest area while exhibiting comparable line and temperature sensitivities. This research has resulted two journals, three peerreviewed conference papers and three granted patents

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Published date: February 2021

Identifiers

Local EPrints ID: 448406
URI: http://eprints.soton.ac.uk/id/eprint/448406
PURE UUID: ce6c6365-946b-4f8b-8f7e-24a0ac4388e4
ORCID for Alexander Weddell: ORCID iD orcid.org/0000-0002-6763-5460

Catalogue record

Date deposited: 21 Apr 2021 16:34
Last modified: 22 Apr 2021 01:38

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Contributors

Author: Parameshwarappa Anand Kumar Savanth
Thesis advisor: Alexander Weddell ORCID iD

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