On low-leakage CMOS switches

Wang, Bo, Wang, Shiwei and Law, Man-Kay (2021) On low-leakage CMOS switches. 2021 IEEE 64th International Midwest Symposium on Circuits and Systems. 09 - 11 Aug 2021. pp. 571-574 . (doi:10.1109/MWSCAS47672.2021.9531780).

Record type: Conference or Workshop Item (Paper)

Abstract

Continuing CMOS process scaling to favor the design of high-performance digital systems has resulted in many issues for precision analog design, and one of which is the detrimental transistor leakage. This paper focuses on the analysis and design of low-leakage switches. Specifically, transistor leakage mechanisms and the evolution of low-leakage switch design techniques are revisited. Different schemes to achieve transistor channel and body leakage reduction are discussed. In addition,we propose a low-leakage switch that can operate for a wide temperature range. At 200 ◦C, it achieves 130× and 8× lower leakage than the transmission gate and the popular analog Tswitch, respectively.

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2021097438 - Accepted Manuscript

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Accepted/In Press date: 30 June 2021

Published date: 9 August 2021

Additional Information: Funding Information: ACKNOWLEDGMENT This publication was made possible by NPRP grant NPRP11S-0104-180192 from the Qatar National Research Fund (a member of Qatar Foundation). Publisher Copyright: © 2021 IEEE.

Venue - Dates: 2021 IEEE 64th International Midwest Symposium on Circuits and Systems, 2021-08-09 - 2021-08-11

Keywords: CMOS switch, CMOS switch array, low-leakage CMOS switch, transistor leakage compensation