The University of Southampton
University of Southampton Institutional Repository

Design flow for hybrid CMOS/memristor systems-part I: modelling and verification steps

Design flow for hybrid CMOS/memristor systems-part I: modelling and verification steps
Design flow for hybrid CMOS/memristor systems-part I: modelling and verification steps
Memristive technology has experienced explosive growth in the last decade, with multiple device structures being developed for a wide range of applications. However, transitioning the technology from the lab into the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade tool chain. In this work, we demonstrate the behaviour of our in-house fabricated custom memristor model and its integration into the Cadence Electronic Design Automation (EDA) tools for verification. Various input stimuli were given to record the memristive device characteristics both at the device level as well as the schematic level for verification of the memristor model. This design flow from device to industrial level EDA tools is the first step before the model can be used and integrated with Complementary Metal-Oxide Semiconductor (CMOS) in applications for hybrid memristor/CMOS system design.
EDA tools, hybrid CMOS/memristor, modelling, verification
1549-8328
4862-4875
Maheshwari, Sachin
f09ac1de-0e3d-410d-a7e2-f4d54a1459b9
Stathopoulos, Spyros
98d12f06-ad01-4708-be19-a97282968ee6
Wang, Jiaqi
8b0d7a69-fc27-4344-ab3d-9f05fba98145
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Pan, Yihan
12b492c2-c7b5-4b8d-86f3-c598472be7a3
Mifsud, Andrea
df65978b-a3c2-4a2a-9fd0-1fcea2b76a62
Leene, Lieuwe
96851f0f-46c5-4df5-bd2e-c62f00e7148b
Shen, Jiawei
1cd6ac59-95b0-4dfa-8baa-f2a2d032943c
Papavassiliou, Christos
86fe7042-20a3-47a9-9430-2bdb6c260303
Constandinou, Timothy
886c48a2-76db-45b8-bb87-35be2faefb65
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Maheshwari, Sachin
f09ac1de-0e3d-410d-a7e2-f4d54a1459b9
Stathopoulos, Spyros
98d12f06-ad01-4708-be19-a97282968ee6
Wang, Jiaqi
8b0d7a69-fc27-4344-ab3d-9f05fba98145
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Pan, Yihan
12b492c2-c7b5-4b8d-86f3-c598472be7a3
Mifsud, Andrea
df65978b-a3c2-4a2a-9fd0-1fcea2b76a62
Leene, Lieuwe
96851f0f-46c5-4df5-bd2e-c62f00e7148b
Shen, Jiawei
1cd6ac59-95b0-4dfa-8baa-f2a2d032943c
Papavassiliou, Christos
86fe7042-20a3-47a9-9430-2bdb6c260303
Constandinou, Timothy
886c48a2-76db-45b8-bb87-35be2faefb65
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf

Maheshwari, Sachin, Stathopoulos, Spyros, Wang, Jiaqi, Serb, Alexantrou, Pan, Yihan, Mifsud, Andrea, Leene, Lieuwe, Shen, Jiawei, Papavassiliou, Christos, Constandinou, Timothy and Prodromakis, Themistoklis (2021) Design flow for hybrid CMOS/memristor systems-part I: modelling and verification steps. IEEE Transactions on Circuits and Systems I: Regular Papers, 68 (12), 4862-4875. (doi:10.1109/TCSI.2021.3122343).

Record type: Article

Abstract

Memristive technology has experienced explosive growth in the last decade, with multiple device structures being developed for a wide range of applications. However, transitioning the technology from the lab into the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade tool chain. In this work, we demonstrate the behaviour of our in-house fabricated custom memristor model and its integration into the Cadence Electronic Design Automation (EDA) tools for verification. Various input stimuli were given to record the memristive device characteristics both at the device level as well as the schematic level for verification of the memristor model. This design flow from device to industrial level EDA tools is the first step before the model can be used and integrated with Complementary Metal-Oxide Semiconductor (CMOS) in applications for hybrid memristor/CMOS system design.

Text
FINAL VERSION_part1 - Accepted Manuscript
Download (8MB)

More information

Accepted/In Press date: 15 October 2021
Published date: 13 November 2021
Additional Information: Publisher Copyright: IEEE Copyright: Copyright 2021 Elsevier B.V., All rights reserved.
Keywords: EDA tools, hybrid CMOS/memristor, modelling, verification

Identifiers

Local EPrints ID: 452602
URI: http://eprints.soton.ac.uk/id/eprint/452602
ISSN: 1549-8328
PURE UUID: 2431fb0f-e3f0-4c9d-b433-1827535c9d72
ORCID for Spyros Stathopoulos: ORCID iD orcid.org/0000-0002-0833-6209
ORCID for Themistoklis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

Catalogue record

Date deposited: 11 Dec 2021 11:28
Last modified: 16 Mar 2024 14:36

Export record

Altmetrics

Contributors

Author: Sachin Maheshwari
Author: Spyros Stathopoulos ORCID iD
Author: Jiaqi Wang
Author: Alexantrou Serb
Author: Yihan Pan
Author: Andrea Mifsud
Author: Lieuwe Leene
Author: Jiawei Shen
Author: Christos Papavassiliou
Author: Timothy Constandinou
Author: Themistoklis Prodromakis ORCID iD

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of http://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×