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Design flow for hybrid CMOS/memristor systems part II: circuit schematics and layout

Design flow for hybrid CMOS/memristor systems part II: circuit schematics and layout
Design flow for hybrid CMOS/memristor systems part II: circuit schematics and layout
The capability of in-memory computation, reconfigurability, low power operation as well as multistate operation of the memristive device deems them a suitable candidate for designing electronic circuits with a broad range of applications. Besides, the integrability of memristor with CMOS enables it to use in logic circuits too. In this work, we demonstrate with examples the design flow for memristor-based electronics, after the custom memristor model already being integrated and validated into our chosen Computer-Aided Design (CAD) tool to perform layout-versus-schematic and post-layout checks including the memristive device. We envisage that this step-by-step guide to introducing memristor into the standard integrated circuit design flow will be a useful reference document for both device developers who wish to benchmark their technologies and circuit designers who wish to experiment with memristive-enhanced systems.
CAD tool, Integrated circuit modeling, Layout, Logic gates, MOSFET, Memristors, RRAM., Resistance, Topology, circuit design, hybrid CMOS/memristor, in-memory computation, low-power
1549-8328
4876-4888
Maheshwari, Sachin
f09ac1de-0e3d-410d-a7e2-f4d54a1459b9
Stathopoulos, Spyros
98d12f06-ad01-4708-be19-a97282968ee6
Wang, Jiaqi
8b0d7a69-fc27-4344-ab3d-9f05fba98145
Serb, Alexantrou
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Pan, Yihan
12b492c2-c7b5-4b8d-86f3-c598472be7a3
Mifsud, Andrea
df65978b-a3c2-4a2a-9fd0-1fcea2b76a62
Leene, Lieuwe
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Shen, Jiawei
1cd6ac59-95b0-4dfa-8baa-f2a2d032943c
Papavassiliou, Christos
86fe7042-20a3-47a9-9430-2bdb6c260303
Constandinou, Timothy
886c48a2-76db-45b8-bb87-35be2faefb65
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf
Maheshwari, Sachin
f09ac1de-0e3d-410d-a7e2-f4d54a1459b9
Stathopoulos, Spyros
98d12f06-ad01-4708-be19-a97282968ee6
Wang, Jiaqi
8b0d7a69-fc27-4344-ab3d-9f05fba98145
Serb, Alexantrou
30f5ec26-f51d-42b3-85fd-0325a27a792c
Pan, Yihan
12b492c2-c7b5-4b8d-86f3-c598472be7a3
Mifsud, Andrea
df65978b-a3c2-4a2a-9fd0-1fcea2b76a62
Leene, Lieuwe
96851f0f-46c5-4df5-bd2e-c62f00e7148b
Shen, Jiawei
1cd6ac59-95b0-4dfa-8baa-f2a2d032943c
Papavassiliou, Christos
86fe7042-20a3-47a9-9430-2bdb6c260303
Constandinou, Timothy
886c48a2-76db-45b8-bb87-35be2faefb65
Prodromakis, Themistoklis
d58c9c10-9d25-4d22-b155-06c8437acfbf

Maheshwari, Sachin, Stathopoulos, Spyros, Wang, Jiaqi, Serb, Alexantrou, Pan, Yihan, Mifsud, Andrea, Leene, Lieuwe, Shen, Jiawei, Papavassiliou, Christos, Constandinou, Timothy and Prodromakis, Themistoklis (2021) Design flow for hybrid CMOS/memristor systems part II: circuit schematics and layout. IEEE Transactions on Circuits and Systems I: Regular Papers, 68 (12), 4876-4888. (doi:10.1109/TCSI.2021.3122381).

Record type: Article

Abstract

The capability of in-memory computation, reconfigurability, low power operation as well as multistate operation of the memristive device deems them a suitable candidate for designing electronic circuits with a broad range of applications. Besides, the integrability of memristor with CMOS enables it to use in logic circuits too. In this work, we demonstrate with examples the design flow for memristor-based electronics, after the custom memristor model already being integrated and validated into our chosen Computer-Aided Design (CAD) tool to perform layout-versus-schematic and post-layout checks including the memristive device. We envisage that this step-by-step guide to introducing memristor into the standard integrated circuit design flow will be a useful reference document for both device developers who wish to benchmark their technologies and circuit designers who wish to experiment with memristive-enhanced systems.

Text
Design_Methodology_for_Memristor_Circuit_Design_TCAS_part2 - Accepted Manuscript
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More information

Accepted/In Press date: 15 October 2021
Published date: 13 November 2021
Keywords: CAD tool, Integrated circuit modeling, Layout, Logic gates, MOSFET, Memristors, RRAM., Resistance, Topology, circuit design, hybrid CMOS/memristor, in-memory computation, low-power

Identifiers

Local EPrints ID: 452604
URI: http://eprints.soton.ac.uk/id/eprint/452604
ISSN: 1549-8328
PURE UUID: 3356951c-f3f9-4c96-8ed1-aa7e0b9e8c47
ORCID for Spyros Stathopoulos: ORCID iD orcid.org/0000-0002-0833-6209
ORCID for Themistoklis Prodromakis: ORCID iD orcid.org/0000-0002-6267-6909

Catalogue record

Date deposited: 11 Dec 2021 11:29
Last modified: 28 Apr 2022 02:14

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Contributors

Author: Sachin Maheshwari
Author: Spyros Stathopoulos ORCID iD
Author: Jiaqi Wang
Author: Alexantrou Serb
Author: Yihan Pan
Author: Andrea Mifsud
Author: Lieuwe Leene
Author: Jiawei Shen
Author: Christos Papavassiliou
Author: Timothy Constandinou
Author: Themistoklis Prodromakis ORCID iD

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