The University of Southampton
University of Southampton Institutional Repository

StitchUp: Automatic control flow protection for high level synthesis circuits

StitchUp: Automatic control flow protection for high level synthesis circuits
StitchUp: Automatic control flow protection for high level synthesis circuits

Soft-error detection in FPGAs typically requires replication, doubling the required area. We propose an approach which distinguishes between tolerable errors in data-flow, such-as arithmetic, and intolerable errors in control-flow, such as branches and their data-dependencies. This approach is demonstrated in a new high-level synthesis compiler pass called StitchUp, which precisely identifies the control critical parts of the design, then automatically replicates only that part. We applied StitchUp to the CHStone benchmark suite and performed exhaustive hardware fault injection in each case, finding that all control-flow errors were detected while only requiring 1% circuit area overhead in the best case.

0738-100X
IEEE
Fleming, Shane T.
1a7f7be0-0c3f-4125-9298-5b5a6e0bc76e
Thomas, David B.
5701997d-7de3-4e57-a802-ea2bd3e6ab6c
Fleming, Shane T.
1a7f7be0-0c3f-4125-9298-5b5a6e0bc76e
Thomas, David B.
5701997d-7de3-4e57-a802-ea2bd3e6ab6c

Fleming, Shane T. and Thomas, David B. (2016) StitchUp: Automatic control flow protection for high level synthesis circuits. In Proceedings of the 53rd Annual Design Automation Conference, DAC 2016. vol. 05-09-June-2016, IEEE.. (doi:10.1145/2897937.2898097).

Record type: Conference or Workshop Item (Paper)

Abstract

Soft-error detection in FPGAs typically requires replication, doubling the required area. We propose an approach which distinguishes between tolerable errors in data-flow, such-as arithmetic, and intolerable errors in control-flow, such as branches and their data-dependencies. This approach is demonstrated in a new high-level synthesis compiler pass called StitchUp, which precisely identifies the control critical parts of the design, then automatically replicates only that part. We applied StitchUp to the CHStone benchmark suite and performed exhaustive hardware fault injection in each case, finding that all control-flow errors were detected while only requiring 1% circuit area overhead in the best case.

This record has no associated files available for download.

More information

Published date: 5 June 2016
Additional Information: Publisher Copyright: © 2016 ACM. Copyright: Copyright 2017 Elsevier B.V., All rights reserved.
Venue - Dates: 53rd Annual ACM IEEE Design Automation Conference, DAC 2016, , Austin, United States, 2016-06-05 - 2016-06-09

Identifiers

Local EPrints ID: 453688
URI: http://eprints.soton.ac.uk/id/eprint/453688
ISSN: 0738-100X
PURE UUID: 35d18f2f-229d-4c5e-91a9-8470ba16ccb3
ORCID for David B. Thomas: ORCID iD orcid.org/0000-0002-9671-0917

Catalogue record

Date deposited: 20 Jan 2022 17:46
Last modified: 17 Mar 2024 04:10

Export record

Altmetrics

Contributors

Author: Shane T. Fleming
Author: David B. Thomas ORCID iD

Download statistics

Downloads from ePrints over the past year. Other digital versions may also be available to download e.g. from the publisher's website.

View more statistics

Atom RSS 1.0 RSS 2.0

Contact ePrints Soton: eprints@soton.ac.uk

ePrints Soton supports OAI 2.0 with a base URL of http://eprints.soton.ac.uk/cgi/oai2

This repository has been built using EPrints software, developed at the University of Southampton, but available to everyone to use.

We use cookies to ensure that we give you the best experience on our website. If you continue without changing your settings, we will assume that you are happy to receive cookies on the University of Southampton website.

×