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Monolithic III-V/SiN co-integration through a butt-coupling scheme towards O-band applications

Monolithic III-V/SiN co-integration through a butt-coupling scheme towards O-band applications
Monolithic III-V/SiN co-integration through a butt-coupling scheme towards O-band applications
Over the last decade, silicon nitride (SiN) has been proven a promising CMOS-compatible material platform instead of the already established silicon-on-insulator (SOI) [1]. That arises mainly from its tuneable physical and optical properties [2], its wider transparency window (low absorption in visible and NIR) along with its mid-index identity (low propagation loss) [3], its low thermo-optic coefficient (WDM applications) [4] and its low two-photon absorption (TPA) (non-linear applications) [5]. Furthermore, the capability of a low-temperature 350 °C PECVD growth method [2] along with SiN’s amorphous identity, renders the back end of line (BEOL) integration with active devices achievable. At the same time, the exploitation of photonic integrated chips (PICs) based on silicon (Si) towards coherent communication applications, is restricted due to the absence of fully integrated optical sources on-chip [6]. Even though progress on the III-V/SiN heterogeneous/hybrid approaches has been reported [7], a large scale monolithic integration of lasers on-chip with compact passive devices, still remains a challenge [8] due to the thick III-V buffer and cladding layers [9].
In this paper, we demonstrate a monolithic III-V/SiN transition on a silicon substrate. The integration of our optically tunable silicon nitride platform [2] with high-gain GaAs-QD multi-layer stack hetero-epitaxially grown on silicon [10] is numerically investigated. In detail, a straight III-V waveguide (n=3.29-3.5) is connected to N-rich SiN waveguides (n=1.9) in a butt-coupling scheme. A Si-rich SiN layer of an intermediate refractive index (n=2.51) is placed at the active-passive interface, so as to alleviate the high-low refractive index difference, while it passivates the III-V waveguide. Using a protective tetraethylorthosilicate (TEOS) layer, a double layer anti-reflective coating (DLARC) is composed towards the minimization of the coupling loss (CL) and parasitic back-reflection (BR). Moreover, we report on a <−30 dB BR and <0.7 dB CL transition based on optical simulations (Lumerical). In addition, preliminary stand-alone characterization results of <2 dB/cm propagation loss and 0.1 dB/90° bending regarding a 1700 nm wide and 1600 nm thick N-rich SiN platform are demonstrated, setting the ground for a future realization of a single-mode Vernier-based laser.
Skandalos, Ilias
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Rutirawut, Teerapat
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Domínguez Bucio, Thalía
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Hou, Yaonan
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Noori, Yasir
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Tang, Mingchu
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Chen, Siming
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Liu, Huiyun
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Gardes, Frederic Y.
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Skandalos, Ilias
3daa2bbe-f6ee-4b6e-ac57-46df0c21c732
Rutirawut, Teerapat
590101f7-65c8-4da3-9a5d-e3d2efd74349
Domínguez Bucio, Thalía
83b57799-c566-473c-9b53-92e9c50b4287
Hou, Yaonan
21cd6d93-63f2-4c1d-8297-6cce6bc7a772
Noori, Yasir
704d0b70-1ea6-4e00-92ce-cc2543087a09
Tang, Mingchu
a9b38203-265f-458f-9205-9a94deffa997
Chen, Siming
3677dc82-9c6c-4711-a326-8c301485c865
Liu, Huiyun
ed01636f-0728-4d76-87ee-08b93635b2aa
Gardes, Frederic Y.
7a49fc6d-dade-4099-b016-c60737cb5bb2

Skandalos, Ilias, Rutirawut, Teerapat, Domínguez Bucio, Thalía, Hou, Yaonan, Noori, Yasir, Tang, Mingchu, Chen, Siming, Liu, Huiyun and Gardes, Frederic Y. (2022) Monolithic III-V/SiN co-integration through a butt-coupling scheme towards O-band applications. Semiconductor and Integrated OptoElectronics (SIOE) Conference, , Cardiff, United Kingdom. 12 - 14 Apr 2022. 1 pp .

Record type: Conference or Workshop Item (Paper)

Abstract

Over the last decade, silicon nitride (SiN) has been proven a promising CMOS-compatible material platform instead of the already established silicon-on-insulator (SOI) [1]. That arises mainly from its tuneable physical and optical properties [2], its wider transparency window (low absorption in visible and NIR) along with its mid-index identity (low propagation loss) [3], its low thermo-optic coefficient (WDM applications) [4] and its low two-photon absorption (TPA) (non-linear applications) [5]. Furthermore, the capability of a low-temperature 350 °C PECVD growth method [2] along with SiN’s amorphous identity, renders the back end of line (BEOL) integration with active devices achievable. At the same time, the exploitation of photonic integrated chips (PICs) based on silicon (Si) towards coherent communication applications, is restricted due to the absence of fully integrated optical sources on-chip [6]. Even though progress on the III-V/SiN heterogeneous/hybrid approaches has been reported [7], a large scale monolithic integration of lasers on-chip with compact passive devices, still remains a challenge [8] due to the thick III-V buffer and cladding layers [9].
In this paper, we demonstrate a monolithic III-V/SiN transition on a silicon substrate. The integration of our optically tunable silicon nitride platform [2] with high-gain GaAs-QD multi-layer stack hetero-epitaxially grown on silicon [10] is numerically investigated. In detail, a straight III-V waveguide (n=3.29-3.5) is connected to N-rich SiN waveguides (n=1.9) in a butt-coupling scheme. A Si-rich SiN layer of an intermediate refractive index (n=2.51) is placed at the active-passive interface, so as to alleviate the high-low refractive index difference, while it passivates the III-V waveguide. Using a protective tetraethylorthosilicate (TEOS) layer, a double layer anti-reflective coating (DLARC) is composed towards the minimization of the coupling loss (CL) and parasitic back-reflection (BR). Moreover, we report on a <−30 dB BR and <0.7 dB CL transition based on optical simulations (Lumerical). In addition, preliminary stand-alone characterization results of <2 dB/cm propagation loss and 0.1 dB/90° bending regarding a 1700 nm wide and 1600 nm thick N-rich SiN platform are demonstrated, setting the ground for a future realization of a single-mode Vernier-based laser.

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SIOE 22 Abstract - Ilias Skandalos - Accepted Manuscript
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Accepted/In Press date: 14 April 2022
e-pub ahead of print date: April 2022
Venue - Dates: Semiconductor and Integrated OptoElectronics (SIOE) Conference, , Cardiff, United Kingdom, 2022-04-12 - 2022-04-14

Identifiers

Local EPrints ID: 455992
URI: http://eprints.soton.ac.uk/id/eprint/455992
PURE UUID: 8f89ab22-dae8-422d-8faf-441ad557a2c3
ORCID for Thalía Domínguez Bucio: ORCID iD orcid.org/0000-0002-3664-1403
ORCID for Yasir Noori: ORCID iD orcid.org/0000-0001-5285-8779
ORCID for Frederic Y. Gardes: ORCID iD orcid.org/0000-0003-1400-3272

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Date deposited: 11 Apr 2022 18:08
Last modified: 18 Mar 2024 03:48

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Contributors

Author: Ilias Skandalos
Author: Yaonan Hou
Author: Yasir Noori ORCID iD
Author: Mingchu Tang
Author: Siming Chen
Author: Huiyun Liu

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