Effect of gate dielectric thickness on the performance of top-down ZnO nanowire field-effect transistors

Ghazali, Nor Azlin, Mohamed, Mohamed Fauzi Packeer, Akbar, Muhammad Firdaus and Chong, Harold (2021) Effect of gate dielectric thickness on the performance of top-down ZnO nanowire field-effect transistors. In, Proceedings of the 11th International Conference on Robotics, Vision, Signal Processing and Power Applications. Springer. (In Press) (doi:10.1007/978-981-16-8129-5_105).

Record type: Book Section

Abstract

The top-down bottom-contact ZnO nanowire field-effect transistors (FETs) utilizing SiO2 as gate dielectric were fabricated and characterize in an attempt to evaluate the device performance effects of gate dielectric thickness variation. In this experiment, four sets of ZnO nanowire FET with gate insulator thicknesses of 0.025 µm, 0.05 µm, 0.075 µm, and 0.10 µm were fabricated. ZnO nanowire were fabricated at room temperature by remote plasma atomic layer deposition (ALD) method. The FETs with 0.10 µm thick gate insulator layer demonstrated better electrical performance as compared to the other devices. The analysis demonstrates that the oxide layer should have the right thickness in order to preserve its insulting capability to function as an insulator layer in fabricated devices.

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Paper_EffectofGateofFielectricThickness-Rovisp2021-Rev_4 - Accepted Manuscript

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