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Application of Boolean difference concept to fault diagnosis

Application of Boolean difference concept to fault diagnosis
Application of Boolean difference concept to fault diagnosis

Application of the Boolean difference concept towards generation of tests for combinational and to some extent for sequential circuits is well )mown. This thesis describes the application of the Boolean difference to the evaluation of fault-cover of combinational and synchronous sequential circuits for a pre-determined test. The thesis is effectively divided into 4'two parts.' The first part concentrates on the data manipulation problems encountered during the generation of Boolean differences on a quantitative basis. With this intent, experiments have been carried out to assess the amount of intermediate and final data generated and deleted in the logical operations used by various methods for generating the Boolean differences. These are the logical operations of complementation, addition and multiplication. Various existing Boolean difference generation schemes have been compared and the one which is computationally most suitable for implementation during the fault-cover evaluation has been determined.-The second part of the thesis is a study of the fault-cover evaluation w itself. A procedure for the determination of fault-cover has been formulated. This is based on the propagation of time-dependent sensitive paths using the enable conditions, derived through the Boolean differences. This being a path-sensitization approach, the fault-cover is influenced by fanout reconvergence. The effect of logical reconvergence has been investigated in detail and a modified Boolean difference chain method has been proposed. This does not involve the consideration of higher order Boolean differences or multiple path sensitization.

University of Southampton
Nanda, Navnit Kumar
Nanda, Navnit Kumar

Nanda, Navnit Kumar (1977) Application of Boolean difference concept to fault diagnosis. University of Southampton, Doctoral Thesis.

Record type: Thesis (Doctoral)

Abstract

Application of the Boolean difference concept towards generation of tests for combinational and to some extent for sequential circuits is well )mown. This thesis describes the application of the Boolean difference to the evaluation of fault-cover of combinational and synchronous sequential circuits for a pre-determined test. The thesis is effectively divided into 4'two parts.' The first part concentrates on the data manipulation problems encountered during the generation of Boolean differences on a quantitative basis. With this intent, experiments have been carried out to assess the amount of intermediate and final data generated and deleted in the logical operations used by various methods for generating the Boolean differences. These are the logical operations of complementation, addition and multiplication. Various existing Boolean difference generation schemes have been compared and the one which is computationally most suitable for implementation during the fault-cover evaluation has been determined.-The second part of the thesis is a study of the fault-cover evaluation w itself. A procedure for the determination of fault-cover has been formulated. This is based on the propagation of time-dependent sensitive paths using the enable conditions, derived through the Boolean differences. This being a path-sensitization approach, the fault-cover is influenced by fanout reconvergence. The effect of logical reconvergence has been investigated in detail and a modified Boolean difference chain method has been proposed. This does not involve the consideration of higher order Boolean differences or multiple path sensitization.

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More information

Published date: 1977

Identifiers

Local EPrints ID: 459996
URI: http://eprints.soton.ac.uk/id/eprint/459996
PURE UUID: 1557a1af-dcf1-4383-ae8e-6c476721509b

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Date deposited: 04 Jul 2022 17:33
Last modified: 04 Jul 2022 17:33

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Author: Navnit Kumar Nanda

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