The validation and verification of low-level code
The validation and verification of low-level code
Software used in safety-critical applications must be correct; the consequences of an error may be too high even to contemplate. Therefore, until `real' compilers have been verified, no reliance should be placed on the correctness of the code which they produce. Also, real-time constraints sometimes make it necessary to develop software in a low-level language. Either way, low-level code must ultimately be verified. This dissertation describes SPADE-8080, a `safe subset' of the Intel 8080 assembly language supplemented with annotations (formal comments). As well as identifying the unverifiable aspects of assembly languages and eliminating them from the SPADE-8080 definition, the thesis explains how all legal SPADE-8080 programs can be translated into FDL, the modelling language of the Southampton Program Analysis and Development Environment (SPADE), for subsequent validation and formal verification with the SPADE flow and semantic analysis tools. The legality of a SPADE-8080 program is checked by the SPADE-8080 to FDL translator which will detect all deviations from the SPADE-8080 definition and, if no errors are found, will generate an FDL model of the program. This model includes previously `hidden' information such as status assignments, addressing modes and single-register/register-pair interactions. The model also contains check-statements from which shallow proofs can be constructed to demonstrate for instance the absence of overflow and correct indirection; they also allow the range analysis of array subscripts. Facilities for full program proof are provided in the form of SPADE-8080 proof annotations. Example flow analyses are discussed and the effectiveness of the flow analysis tools in detecting errors examined. The method used to construct a program's proof from its FDL model is also discussed and some examples given. Finally, future extensions and directions for the work are explored. (D71900/87)
University of Southampton
Clutterbuck, Denton Leslie
1986
Clutterbuck, Denton Leslie
Clutterbuck, Denton Leslie
(1986)
The validation and verification of low-level code.
University of Southampton, Doctoral Thesis.
Record type:
Thesis
(Doctoral)
Abstract
Software used in safety-critical applications must be correct; the consequences of an error may be too high even to contemplate. Therefore, until `real' compilers have been verified, no reliance should be placed on the correctness of the code which they produce. Also, real-time constraints sometimes make it necessary to develop software in a low-level language. Either way, low-level code must ultimately be verified. This dissertation describes SPADE-8080, a `safe subset' of the Intel 8080 assembly language supplemented with annotations (formal comments). As well as identifying the unverifiable aspects of assembly languages and eliminating them from the SPADE-8080 definition, the thesis explains how all legal SPADE-8080 programs can be translated into FDL, the modelling language of the Southampton Program Analysis and Development Environment (SPADE), for subsequent validation and formal verification with the SPADE flow and semantic analysis tools. The legality of a SPADE-8080 program is checked by the SPADE-8080 to FDL translator which will detect all deviations from the SPADE-8080 definition and, if no errors are found, will generate an FDL model of the program. This model includes previously `hidden' information such as status assignments, addressing modes and single-register/register-pair interactions. The model also contains check-statements from which shallow proofs can be constructed to demonstrate for instance the absence of overflow and correct indirection; they also allow the range analysis of array subscripts. Facilities for full program proof are provided in the form of SPADE-8080 proof annotations. Example flow analyses are discussed and the effectiveness of the flow analysis tools in detecting errors examined. The method used to construct a program's proof from its FDL model is also discussed and some examples given. Finally, future extensions and directions for the work are explored. (D71900/87)
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Published date: 1986
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Local EPrints ID: 460779
URI: http://eprints.soton.ac.uk/id/eprint/460779
PURE UUID: 1b312d2e-4b55-43a5-abb6-c40b4187a8c5
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Date deposited: 04 Jul 2022 18:29
Last modified: 04 Jul 2022 18:29
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Author:
Denton Leslie Clutterbuck
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