Macrosimulation of LSI circuits for timing and waveform data
Macrosimulation of LSI circuits for timing and waveform data
The computer based prediction of the time domain performance of digital, (V)LSI circuits is considered in this thesis. The modelling and analysis techniques that are presently used are reviewed. The principles of a macrosimulator are described and its performance examined. Algorithms are presented for the interactive characterisation of Boolean gate macromodels. The practicalities of macromodelling larger elements are studied. A circuit level model for integrated, short channel MOSFETs is decribed and evaluated. The exploitation of redundancy in circuit level, transient analyses, by hierarchical simulation, is considered and the technique compared with macrosimulation. (D73133/87)
University of Southampton
Fyson, Clifford Joseph Richard
1986
Fyson, Clifford Joseph Richard
Fyson, Clifford Joseph Richard
(1986)
Macrosimulation of LSI circuits for timing and waveform data.
University of Southampton, Doctoral Thesis.
Record type:
Thesis
(Doctoral)
Abstract
The computer based prediction of the time domain performance of digital, (V)LSI circuits is considered in this thesis. The modelling and analysis techniques that are presently used are reviewed. The principles of a macrosimulator are described and its performance examined. Algorithms are presented for the interactive characterisation of Boolean gate macromodels. The practicalities of macromodelling larger elements are studied. A circuit level model for integrated, short channel MOSFETs is decribed and evaluated. The exploitation of redundancy in circuit level, transient analyses, by hierarchical simulation, is considered and the technique compared with macrosimulation. (D73133/87)
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Published date: 1986
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Local EPrints ID: 460992
URI: http://eprints.soton.ac.uk/id/eprint/460992
PURE UUID: c98f3041-e2fa-47d0-8e0a-adb17d5e89e7
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Date deposited: 04 Jul 2022 18:33
Last modified: 04 Jul 2022 18:33
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Author:
Clifford Joseph Richard Fyson
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