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The construction and control of a MIMD computer

The construction and control of a MIMD computer
The construction and control of a MIMD computer

The transputer Supernode is a distributed memory, message passing concurrent computer architecture which has applications ranging from personal workstation to large scale scientific computation. The broad application range is achieved by a modular architecture which allows an ensemble of INMOS T800 transputers to operate effectively together in a flexible interprocessor communications environment. Arbitrary link network topologies are realised by the use of a reconfigurable link switch implementing an Eulerian cycle routing scheme. A global bus provides control and communications across the processor ensemble which augment communications via the links. The hardware architecture of the Supernode is discussed and in particular the global bus is described in detail. The implementation of the global bus, and some other subsystems are described, with special reference to the design tools and techniques employed. The operation of the T800 transputer at the temperature of liquid nitrogen is investigated and the construction of a multi-transputer cryogenic computer is described.

University of Southampton
Moore, Michael Peter
Moore, Michael Peter

Moore, Michael Peter (1989) The construction and control of a MIMD computer. University of Southampton, Doctoral Thesis.

Record type: Thesis (Doctoral)

Abstract

The transputer Supernode is a distributed memory, message passing concurrent computer architecture which has applications ranging from personal workstation to large scale scientific computation. The broad application range is achieved by a modular architecture which allows an ensemble of INMOS T800 transputers to operate effectively together in a flexible interprocessor communications environment. Arbitrary link network topologies are realised by the use of a reconfigurable link switch implementing an Eulerian cycle routing scheme. A global bus provides control and communications across the processor ensemble which augment communications via the links. The hardware architecture of the Supernode is discussed and in particular the global bus is described in detail. The implementation of the global bus, and some other subsystems are described, with special reference to the design tools and techniques employed. The operation of the T800 transputer at the temperature of liquid nitrogen is investigated and the construction of a multi-transputer cryogenic computer is described.

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More information

Published date: 1989

Identifiers

Local EPrints ID: 461802
URI: http://eprints.soton.ac.uk/id/eprint/461802
PURE UUID: 0733d1e1-db08-4ffb-b8e6-a51c2f58886f

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Date deposited: 04 Jul 2022 18:55
Last modified: 04 Jul 2022 18:55

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Contributors

Author: Michael Peter Moore

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