The application of beam annealing to silicon device fabrication
The application of beam annealing to silicon device fabrication
A scanning electron-beam annealer (SEBA) has been constructed using readily available components and featuring simple electrostatic deflection systems and versatile control electronics. This system has several novel features and offers many advantages over other equipment available, and provides two main modes of annealing, the isothermal and linescan modes. Measurement of sample temperature-time cycles is described, together with simulations based upon a simple analytic expression. This SEBA has been used in the isothermal mode for the annealing of ion implantation damage remaining after the formation of As+ and BF2+ source/drain regions in NMOS and CMOS technologies. Detailed studies have been made of the activation and diffusion of arsenic and boron from such high dose implanted regions. Measurements of sheet resistivity, dopant profiles and device characteristics have been made using a variety of techniques. Lower sheet resistivities coupled with shallower junction depths, as compared with conventional furnace annealing methods, have been observed. MOSFETs with sub-micron gate lengths have been fabricated using these anneals, and ring oscillator circuits exhibit faster switching times than for conventionally processed devices. Scanning electron-beam annealing methods have been applied to an advanced polysilicon emitter bipolar transistor process. Devices fabricated using two different emitter interfacial treatments have been studied and measurements of such devices have shown that these electron-beam annealing experiments have produced poor device characteristics. Reasons for the reduced device gains and non-ideal behaviour, as compared with conventionally processed devices are suggested in terms of `balling-up' of the interfacial layer and proximity of the emitter-base junction to the interfacial region. A new `dual-pulse' electron-beam annealing technique is described, made possible by making simple modifications to the SEBA. This technique, which enables sub-second anneal schedules to be performed, has been applied to the high dose As+ and BF2+ source/drain implants, and significant reductions in dopant diffusion have been observed, as compared with the isothermal annealing mode. (D82112)
University of Southampton
1987
Hart, Michael James
(1987)
The application of beam annealing to silicon device fabrication.
University of Southampton, Doctoral Thesis.
Record type:
Thesis
(Doctoral)
Abstract
A scanning electron-beam annealer (SEBA) has been constructed using readily available components and featuring simple electrostatic deflection systems and versatile control electronics. This system has several novel features and offers many advantages over other equipment available, and provides two main modes of annealing, the isothermal and linescan modes. Measurement of sample temperature-time cycles is described, together with simulations based upon a simple analytic expression. This SEBA has been used in the isothermal mode for the annealing of ion implantation damage remaining after the formation of As+ and BF2+ source/drain regions in NMOS and CMOS technologies. Detailed studies have been made of the activation and diffusion of arsenic and boron from such high dose implanted regions. Measurements of sheet resistivity, dopant profiles and device characteristics have been made using a variety of techniques. Lower sheet resistivities coupled with shallower junction depths, as compared with conventional furnace annealing methods, have been observed. MOSFETs with sub-micron gate lengths have been fabricated using these anneals, and ring oscillator circuits exhibit faster switching times than for conventionally processed devices. Scanning electron-beam annealing methods have been applied to an advanced polysilicon emitter bipolar transistor process. Devices fabricated using two different emitter interfacial treatments have been studied and measurements of such devices have shown that these electron-beam annealing experiments have produced poor device characteristics. Reasons for the reduced device gains and non-ideal behaviour, as compared with conventionally processed devices are suggested in terms of `balling-up' of the interfacial layer and proximity of the emitter-base junction to the interfacial region. A new `dual-pulse' electron-beam annealing technique is described, made possible by making simple modifications to the SEBA. This technique, which enables sub-second anneal schedules to be performed, has been applied to the high dose As+ and BF2+ source/drain implants, and significant reductions in dopant diffusion have been observed, as compared with the isothermal annealing mode. (D82112)
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Published date: 1987
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Local EPrints ID: 461829
URI: http://eprints.soton.ac.uk/id/eprint/461829
PURE UUID: 9b659edf-9043-4ef2-b991-1f015a809481
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Date deposited: 04 Jul 2022 18:56
Last modified: 04 Jul 2022 18:56
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Author:
Michael James Hart
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