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Sparse-matrix techniques for non-linear network analysis on a small computer

Sparse-matrix techniques for non-linear network analysis on a small computer
Sparse-matrix techniques for non-linear network analysis on a small computer

The object of the present work is to establish a sparse-matrix solution technique suitable for non-linear network transient-analysis on small computers. The problems and restrictions such as inaccuracy due to a very limited word length of the machine, small core store and low speed in performing floating-point -operations are particularly considered. For this purpose a scheme which leads to an acceptable economy in terms of analysis run time while maintaining the accuracy of the analysis is presented. In this scheme, the nodes of the network are split into two groups and the coefficient matrix is split into two corresponding partitions. Different types of node grouping have been investigated and one appropriate to optimal partitioning of the matrix has been introduced. A matrix re-ordering method to minimize the number of floating-point arithmetic operations performed in the analysis is also presented. A brief description of implementation of the re-ordering and solution program in the DDP-5161 Honeywell machine installed in the Electronics Department of University of Southampton is given. To illustrate the experimental results and justify the usefulness of the partitioning and re-ordering schemes, numerical examples are demonstrated where appropriate.

University of Southampton
Raghemi Azar, Ali
Raghemi Azar, Ali

Raghemi Azar, Ali (1975) Sparse-matrix techniques for non-linear network analysis on a small computer. University of Southampton, Doctoral Thesis.

Record type: Thesis (Doctoral)

Abstract

The object of the present work is to establish a sparse-matrix solution technique suitable for non-linear network transient-analysis on small computers. The problems and restrictions such as inaccuracy due to a very limited word length of the machine, small core store and low speed in performing floating-point -operations are particularly considered. For this purpose a scheme which leads to an acceptable economy in terms of analysis run time while maintaining the accuracy of the analysis is presented. In this scheme, the nodes of the network are split into two groups and the coefficient matrix is split into two corresponding partitions. Different types of node grouping have been investigated and one appropriate to optimal partitioning of the matrix has been introduced. A matrix re-ordering method to minimize the number of floating-point arithmetic operations performed in the analysis is also presented. A brief description of implementation of the re-ordering and solution program in the DDP-5161 Honeywell machine installed in the Electronics Department of University of Southampton is given. To illustrate the experimental results and justify the usefulness of the partitioning and re-ordering schemes, numerical examples are demonstrated where appropriate.

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Published date: 1975

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Local EPrints ID: 462830
URI: http://eprints.soton.ac.uk/id/eprint/462830
PURE UUID: 2ac8b7c4-d3da-4032-b9aa-98d0b1d6641c

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Date deposited: 04 Jul 2022 20:12
Last modified: 04 Jul 2022 20:12

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Author: Ali Raghemi Azar

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