Structural testing and DFT insertion for analogue and mixed signal integrated circuits
Structural testing and DFT insertion for analogue and mixed signal integrated circuits
As digital IC testing has matured over the past 20 years, structurally-based testing has become the predominant test technique. This is in contrast to analogue testing which is comparatively immature and still mainly uses functionally-based tests. The use of structurally-based tests for digital circuits has allowed higher quality test to be developed more quickly and easily. This is because tests are targeted at list of possible faults derived from information about the structure of a circuit, including connectivity or layout information. As tests are developed for specific faults, redundant tests are avoided, which results in fewer tests compared to a functionally-based test approach.
A further issue with integrated circuit testing is the use of Design For Test (DFT), which is used routinely in digital circuits, but its uses in analogue and mixed-signal circuits have proved elusive. In the case of analogue circuits the inclusion of DFT is often resisted as it is perceived as being detrimental to circuit performance and its benefit are difficult to quantify. As DFT is intended to improve circuit testability its benefit cannot be assessed unless the testability of the circuit can be measured. A solution to this problem is to use a structurally-based testing approach which, unlike a functionally based approach, allows the testability of a circuit to be measured. This in turn allows the effectiveness of tests and DFT structures to be assessed.
In this thesis the problems of using a structurally-based testing approach to generate an analysis of circuit testability are considered. Then the use of testability analysis in the implementation of analogue and mixed signal DFT is investigated. A number of software tools and techniques have been developed to automate the fault simulation process and solve the problems associated with the use of structural testing and DFT. These include a fault generation tool capable of generating different types of fault-lists and a tool capable of managing fault simulations. Comparison between the fault-free and faulty responses is also performed by the second tool, with the results being correlated for analysis in a spreadsheet.
University of Southampton
1999
Perkins, Andrew John
(1999)
Structural testing and DFT insertion for analogue and mixed signal integrated circuits.
University of Southampton, Doctoral Thesis.
Record type:
Thesis
(Doctoral)
Abstract
As digital IC testing has matured over the past 20 years, structurally-based testing has become the predominant test technique. This is in contrast to analogue testing which is comparatively immature and still mainly uses functionally-based tests. The use of structurally-based tests for digital circuits has allowed higher quality test to be developed more quickly and easily. This is because tests are targeted at list of possible faults derived from information about the structure of a circuit, including connectivity or layout information. As tests are developed for specific faults, redundant tests are avoided, which results in fewer tests compared to a functionally-based test approach.
A further issue with integrated circuit testing is the use of Design For Test (DFT), which is used routinely in digital circuits, but its uses in analogue and mixed-signal circuits have proved elusive. In the case of analogue circuits the inclusion of DFT is often resisted as it is perceived as being detrimental to circuit performance and its benefit are difficult to quantify. As DFT is intended to improve circuit testability its benefit cannot be assessed unless the testability of the circuit can be measured. A solution to this problem is to use a structurally-based testing approach which, unlike a functionally based approach, allows the testability of a circuit to be measured. This in turn allows the effectiveness of tests and DFT structures to be assessed.
In this thesis the problems of using a structurally-based testing approach to generate an analysis of circuit testability are considered. Then the use of testability analysis in the implementation of analogue and mixed signal DFT is investigated. A number of software tools and techniques have been developed to automate the fault simulation process and solve the problems associated with the use of structural testing and DFT. These include a fault generation tool capable of generating different types of fault-lists and a tool capable of managing fault simulations. Comparison between the fault-free and faulty responses is also performed by the second tool, with the results being correlated for analysis in a spreadsheet.
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Published date: 1999
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Local EPrints ID: 463923
URI: http://eprints.soton.ac.uk/id/eprint/463923
PURE UUID: 4574a944-514b-4c12-a24c-dacb6d399e9f
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Date deposited: 04 Jul 2022 20:58
Last modified: 04 Jul 2022 20:58
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Author:
Andrew John Perkins
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