Automating system on chip development

Chapman, Andrew Mark (2007) Automating system on chip development. University of Southampton, Doctoral Thesis.

Abstract

This thesis presents a cosynthesis tool designed to target single IC platforms containing both uncommitted logic and a processor core.  The input to synthesis is a single behavioural (algorithmic) specification.  The synthesised output comprises both hardware and software specifications.  The (combined) output specification is refined to such a degree that it may, with no modification, be realised as a circuit.  (This realisation assumes the use of existing commercial tools, which translate RTL hardware and assembly software into netlists and binaries.)

Whilst other cosynthesis tools exist, all are primarily either hardware or software tools with the other domain appended as a simple translation step or a separate routine.  This research re-examines both areas to formulate and implement an entirely integrated tool for combined hardware and software realisations.  Whilst hardware and software research stand quite distinct, much of the early work in behavioural hardware synthesis was simply replicated from existing software research.  As such, it is possible for a single approach to address issues in both domains.

The contribution of this thesis is the creation of a fully automated tool for the combined synthesis (and compilation) of both hardware and software.  The tool automatically constructs an interface, which facilitates communication between hardware and software parts.  Further, an operating system is generated and customised to the design, permitting multiple threads of control (i.e. hardware processes) to be executed in software.  This allows software to support multiple threads of control that are natural in hardware.  As a result, the designer can specify a multiple-process system algorithmically, with no regard for the specifics of the target architecture.  The design will then be taken, transparently to the user and without requiring any further design decisions, to a combined hardware/software implementation.  The utility of this work has been fully demonstrated by synthesising eleven designs to a mixed hardware/software target.

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