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POETS: A parallel cluster architecture for Spiking Neural Network

POETS: A parallel cluster architecture for Spiking Neural Network
POETS: A parallel cluster architecture for Spiking Neural Network
Spiking Neural Networks (SNNs) are known as a branch of neuromorphic computing and are currently used in neuroscience applications to understand and model the biological brain. SNNs could also potentially be used in many other application domains such as classification, pattern recognition, and autonomous control. This work presents a highly-scalable hardware platform called POETS, and uses it to implement SNN on a very large number of parallel and reconfigurable FPGA-based processors. The current system consists of 48 FPGAs, providing 3072 processing cores and 49152 threads. We use this hardware to implement up to four million neurons with one thousand synapses. Comparison to other similar platforms shows that the current POETS system is twenty times faster than the Brian simulator, and at least two times faster than SpiNNaker.
281-285
Shahsavari, Mahyar
a120fae7-9361-4f5d-ad6a-60f50f84da34
Beaumont, Jonathan
363f26be-7b4c-4abf-988b-c90c72fdc2f9
Thomas, David
5701997d-7de3-4e57-a802-ea2bd3e6ab6c
Brown, Andrew
5c19e523-65ec-499b-9e7c-91522017d7e0
Shahsavari, Mahyar
a120fae7-9361-4f5d-ad6a-60f50f84da34
Beaumont, Jonathan
363f26be-7b4c-4abf-988b-c90c72fdc2f9
Thomas, David
5701997d-7de3-4e57-a802-ea2bd3e6ab6c
Brown, Andrew
5c19e523-65ec-499b-9e7c-91522017d7e0

Shahsavari, Mahyar, Beaumont, Jonathan, Thomas, David and Brown, Andrew (2021) POETS: A parallel cluster architecture for Spiking Neural Network. International Journal of Machine Learning and Computing, 11 (4), 281-285. (doi:10.18178/ijmlc.2021.11.4.1048).

Record type: Article

Abstract

Spiking Neural Networks (SNNs) are known as a branch of neuromorphic computing and are currently used in neuroscience applications to understand and model the biological brain. SNNs could also potentially be used in many other application domains such as classification, pattern recognition, and autonomous control. This work presents a highly-scalable hardware platform called POETS, and uses it to implement SNN on a very large number of parallel and reconfigurable FPGA-based processors. The current system consists of 48 FPGAs, providing 3072 processing cores and 49152 threads. We use this hardware to implement up to four million neurons with one thousand synapses. Comparison to other similar platforms shows that the current POETS system is twenty times faster than the Brian simulator, and at least two times faster than SpiNNaker.

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e-pub ahead of print date: 1 July 2021

Identifiers

Local EPrints ID: 468746
URI: http://eprints.soton.ac.uk/id/eprint/468746
PURE UUID: d222bfc0-0ca9-4ae0-bf7d-a74b9ad41578
ORCID for David Thomas: ORCID iD orcid.org/0000-0002-9671-0917

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Date deposited: 24 Aug 2022 16:39
Last modified: 17 Mar 2024 04:10

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Contributors

Author: Mahyar Shahsavari
Author: Jonathan Beaumont
Author: David Thomas ORCID iD
Author: Andrew Brown

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